Cadence Accelerates Intelligent SoC Development with Comprehensive On-Device Tensilica AI Platform

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Cadence Design Systems, Inc. unveiled its Tensilica® AI Platform for accelerating AI SoC development, including three supporting product families optimized for varying data and on-device AI requirements. Spanning the low, mid and high end, the comprehensive Cadence® Tensilica AI Platform delivers scalable and energy-efficient on-device to edge AI processing, which is key to today’s increasingly ubiquitous AI SoCs. A new companion AI neural network engine (NNE) consumes 80% less energy per inference and delivers more than 4X TOPS/W compared to industry-leading standalone Tensilica DSPs, while neural network accelerators (NNAs) deliver flagship AI performance and energy efficiency in a turnkey solution.

Targeting intelligent sensor, internet of things (IoT) audio, mobile vision/voice AI, IoT vision and advanced driver assistance systems (ADAS) applications, the Tensilica AI Platform delivers optimal power, performance and area (PPA) and scalability with a common software platform. Built upon the highly successful application-specific Tensilica DSPs already shipping in volume production in leading AI SoCs for the consumer, mobile, automotive and industrial markets, the Tensilica AI Platform product families include:

AI Base: Includes the popular Tensilica HiFi DSPs for audio/voice, Vision DSPs, and ConnX DSPs for radar/lidar and communications, combined with AI instruction-set architecture (ISA) extensions.

AI Boost: Adds a companion NNE, initially the Tensilica NNE 110 AI engine, which scales from 64 to 256 GOPS and provides concurrent signal processing and efficient inferencing.

AI Max: Encompasses the Tensilica NNA 1xx AI accelerator family—currently including the Tensilica NNA 110 accelerator and the NNA 120, NNA 140 and NNA 180 multi-core accelerator options—which integrates the AI Base and AI Boost technology. The multi-core NNA accelerators can scale up to 32 TOPS, while future NNA products are targeted to scale to 100s of TOPS.

All of the NNE and NNA products include random sparse compute to improve performance, run-time tensor compression to decrease memory bandwidth, and pruning plus clustering to reduce model size.

Comprehensive common AI software addresses all target applications, streamlining product development and enabling easy migration as design requirements evolve. This software includes the Tensilica Neural Network Compiler, which supports these industry-standard frameworks: TensorFlow, ONNX, PyTorch, Caffe2, TensorFlowLite and MXNet for automated end-to-end code generation; Android Neural Network Compiler; TFLite Delegates for real-time execution; and TensorFlow Lite Micro for microcontroller-class devices.

“AI SoC developers are challenged to get to market faster with cost-effective, differentiated products offering longer battery life and scalable performance,” said Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. “With our mature, extensible and configurable platform based on our best-in-class Tensilica DSPs and featuring common AI software, Cadence allows AI SoC developers to minimize development costs and meet tight market windows. By enabling AI across all performance and price points, Cadence is driving the rapid deployment of AI-enabled systems everywhere.”

“Scaling low power on-device AI capabilities requires extremely efficient multi-sensory compute. Cadence and the TensorFlow Lite for Microcontrollers (TFLM) team have been working together for many years to co-develop solutions that enable the most cutting-edge, low-footprint use cases in the AI space. The trend for real-time audio networks to use LSTM-based neural nets for the best performance and efficiency is a key example. Working closely with Cadence, we are integrating a highly optimized LSTM operator on Tensilica HiFi DSPs that enables the next level of performance improvements for key use cases like voice-call noise suppression. We are excited to continue this collaboration and provide industry-level innovation in the low-energy AI space,” says Pete Warden, Technical Lead of TensorFlow Lite Micro at Google

“On-device AI deployment on our KL720—a 1.4 TOPS AI SoC targeted for vehicles, smart home, smart security, industrial control applications, healthcare and AI of things (AIoT)—is key to both our customers’ success and our mission to enable AI everywhere, for everyone. Cadence’s high-performance, low-power Tensilica Vision DSPs pack a lot of compute capacity with AI ISA extensions plus the necessary AI software to tackle the latest AI challenges,” says Albert Liu, Founder and CEO of Kneron

“Integrating a Cadence Tensilica HiFi 4 DSP into the NXP i.MX RT600 crossover MCU not only provides high-performance DSP capabilities for a broad range of audio and voice processing applications, but also increases inference performance, enabling AI even in very low-power, battery-operated products. The HiFi neural network library allows NXP to take full advantage of the AI capabilities of the HiFi 4 DSP and integrate it into NXP’s eIQ Machine Learning Software Development Environment supporting the TensorFlow Lite Micro and Glow ML inference engines,” says Cristiano Castello, Sr. Director of Microcontrollers Product Innovation at NXP Semiconductors

“As AI applications are rapidly propagating from the cloud to the edge, integrating an AI accelerator on-device has become a must to meet low-latency requirements in ADAS, mobile, intelligent sensors and the IoT. AI SoCs require mature accelerator IP that addresses the varying needs of each market and includes a comprehensive software solution. With its Tensilica AI Base, AI Boost and AI Max technology that provides a clear migration path as performance and energy requirements evolve, Cadence is a compelling IP provider for comprehensive on-device AI IP solutions,” says Mike Demler, Senior Analyst at The Linley Group

Availability 

The NNE 110 AI engine and the NNA 1xx AI accelerator family support Cadence’s Intelligent System Design™ strategy, which enables pervasive intelligence for SoC design excellence, and are expected to be in general availability in the fourth quarter of 2021.