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Trouble in Your Tank: Lead-free and the Fabrication Challenge, Part 1

A thick, high layer-count multilayer is one of the hardest printed circuit boards to adapt to lead-free assembly processes. The reason: Multilayers often have through-hole and hand-soldered components and require two or more reflow cycles. The higher reflow temperatures and slower wetting of lead-free solders place an enormous strain on the laminate and copper-plated hole barrel. In many cases, the boards cannot be assembled reliably, even with newer, higher thermal performance FR-4 materials.

One solution to this problem is to redesign the multilayer using current design rules and newer innovative fabrication technologies. Microvias offer a significant opportunity to reduce the layers and thicknesses of multilayers at a reasonable cost—all while improving electrical performance and density.

Consider blind vias, which are surface phenomena. To get maximum benefit from them, layer assignment for signal, ground, and power must be reviewed, and alternative constructions should be considered. Reducing the number of through-holes helps increase routing density and lower layer usage. You can achieve higher connector density and improve electrical performance by replacing through-hole connectors with surface-mount connectors.

These new multilayers are not only thinner, cheaper, and easier to design, but are less costly and suitable for lead-free assembly. I will discuss this and several enabling technologies, including laser-drilled microvias and new SMT connectors, in future columns.

The Issue
Tin/lead (Sn/Pb) alloys have been used for many years in the assembly of printed circuits. Eutectic Sn/Pb has a melting point of 183°C, and temperatures during assembly commonly reach 230°C. The primary alternatives to Sn/Pb are tin/silver/copper alloys. These alloys have melting points near 217°C, with typical peak assembly temperatures reaching 255°C to 260°C. This increase in assembly temperature, coupled with the possibility of multiple exposures to these temperatures, requires the base materials to have improved thermal stability.

Several technical papers have illustrated important data on the effect of lead-free assembly on base materials^1,2. While there are many important properties to consider, there are a few that deserve special attention in light of current trends and the need for improved thermal performance. These include glass transition temperature (Tg), coefficient of thermal expansion (CTEs), and decomposition temperature (Td).

As the temperatures which printed circuits are exposed to increase, as in lead-free assembly processes, the Td of the material becomes a much more critical property to understand³. The Td is a measure of actual chemical and physical degradation of the resin system. This test uses thermogravimetric analysis, which measures the mass of a sample versus temperature. The Td is reported as the temperature at which 5% of the mass of the sample is lost to decomposition. Experience shows that the Td is a critical property, and appears to be at least as important, if not more important, than the glass transition temperature when planning for lead-free assembly conversion. While the definition of the Td uses a weight loss value of 5%, it is very important to understand the point at which 2-3% weight loss occurs, or where the onset of decomposition begins. In examining soldering reflow profiles, traditional Sn/Pb assembly processes can reach peak temperatures of 210°C to 245°C, with 230°C a very common value. In this range, most FR-4s do not exhibit significant levels of decomposition. However, if you examine the temperature range where lead-free assembly processes are operating, you can see that the traditional FR-4 materials exhibit a 2-3% weight loss. Severe levels of degradation can result from multiple exposures to these temperatures. This problem increases when there are 20-plus layers, resulting in thicker boards, and many are power or ground planes.

There are two primary failure mechanisms for printed wiring boards. Failures are mainly due to thermal or mechanical excursions. Plated through-hole (PTH) failures are the predominant source of PCB failures in service and predicting them is the primary goal of PCB testing at elevated temperatures. PTH reliability testing should simulate the thermal excursions of a PTH throughout its life. Generally, the most severe thermal cycles are experienced during assembly and rework. With that said, the materials that make up the board construction are thus critical to PTH reliability. As more boards are subjected to the higher temperatures required for lead-free assembly, layer counts, Tg, and Td must be considered.

The glass transition temperatures range from 125°C to 170°C (and somewhat higher for select resin materials). These temperature ranges may not be sufficient for most high temperature and harsh environment applications. Epoxy-based materials with Tg greater than 170°C, and polyimide resins with higher Tg (over 200°C), are indicated for long-term thermal resistance, especially in harsh use environments. These materials are effective for PTH life and high-performance multilayer PCBs with high layer counts. There are significant consequences for high layer count multilayers. This and the move to microvias will be discussed in next month’s column.

References 

1. “Different Curing System Can Improve Laminate Performance,” by Christos Chrisafides, The Board Authority-Live, June 2004.
2. “How to Get Started in HDI With Microvias,” by Happy Holden, CircuiTree, November 2003.
3. “Advantages of BGA for Backplane Connectors”, by Jim Nadolny, DesignCon 2002, TecForum HP-TF4, pp.5.

This column originally appeared in the April 2023 issue of PCB007 Magazine.