Cadence Custom/Analog Design Migration Flow Accelerates Adoption of TSMC Advanced Process Technologies
September 26, 2023 | Cadence Design Systems, Inc.Estimated reading time: 2 minutes
Cadence Design Systems, Inc. announced the expansion of its node-to-node design migration flow based on the Cadence® Virtuoso® Studio, which is compatible with all TSMC advanced nodes, including the latest N3E and N2 process technologies. This generative design migration flow was developed by Cadence and TSMC to provide joint customers with a simplified and automated approach to migrating custom and analog IC designs among TSMC’s advanced process technologies. Customers already using the flow have successfully reduced migration time by up to 3X when compared with manual migration.
Virtuoso Studio facilitates the migration of schematic cells, parameters, pins and wiring from one TSMC process node to another. The Virtuoso ADE Suite’s simulation and circuit optimization environment then tunes and optimizes the new schematic to ensure the design achieves all required specifications and measurements. Cadence and TSMC customers can then automatically recognize and extract groups of devices in an existing layout, and apply them to similar groups in the new layout, using Virtuoso Layout Suite’s generative design technology.
This flow allows customers to migrate a wide range of analog designs on TSMC process technologies. TSMC process nodes supported by this flow include:
- N40 to N22
- N22 to N12
- N12 to N6
- N6 to N4
- N5 to N3E
- N4/N5 to N3E
- N3E to N2
“Many TSMC customers are looking to migrate legacy designs to TSMC advanced processes to take full advantage of the higher performance and lower power benefits that TSMC provides,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “We have worked closely with Cadence to offer our mutual customers the ability to easily migrate their valuable custom IP. These enhanced PDKs and methodologies simplify and accelerate the design migration process and speed time to market.”
“Through the expansion of our collaboration with TSMC on custom/analog process migration, our joint customers benefit from our generative technologies that make custom/analog migration simpler and less time-consuming,” said Tom Beckley, senior vice president and general manager in the Custom IC & PCB Group at Cadence. “Using our new Virtuoso Studio, we’ve developed an advanced migration flow to help our mutual customers be more productive and meet stringent time-to-market goals.”
Cadence Virtuoso Studio supports the Cadence Intelligent System Design™ strategy, enabling system-on-chip (SoC) design excellence.
Suggested Items
Biden-Harris Administration: CHIPS Incentives Award to TSMC Arizona
11/15/2024 | U.S. Chamber of CommerceTSMC Arizona Corporation (TSMC Arizona), a subsidiary of Taiwan Semiconductor Manufacturing Company Limited (TSMC), up to $6.6 billion in direct funding under the CHIPS Incentives Program’s Funding Opportunity for Commercial Fabrication Facilities.
TSMC Pioneering Circular Economy in Semiconductor Manufacturing
11/13/2024 | TSMCTSMC marked a significant milestone in sustainable manufacturing with the inauguration of the Taichung Zero Waste Manufacturing Center.
Reports Indicate TSMC to Tighten Scrutiny on Chinese AI Chip Clients; Potential Revenue Impact Between 5% to 8%
11/11/2024 | TrendForceReports suggest that TSMC has notified its Chinese clients of a temporary suspension on shipments of advanced AI chips produced using 7nm and below process nodes.
TSMC Recognizes Ansys for Excellence in Design Enablement for AI, HPC, and Photonics Silicon Systems
10/28/2024 | ANSYSAnsys was recognized at the TSMC 2024 Open Innovation Platform® (OIP) Partner of the Year awards for excellence in design enablement for AI, HPC, and photonics silicon systems.
Amkor, TSMC to Expand Partnership and Collaborate on Advanced Packaging in Arizona
10/08/2024 | TSMCAmkor Technology, Inc. and TSMC announced that the two companies have signed a memorandum of understanding to collaborate and bring advanced packaging and test capabilities to Arizona, further expanding the region’s semiconductor ecosystem.