Worldwide Silicon Wafer Shipments Fall in Q3 2023
November 2, 2023 | SEMIEstimated reading time: 1 minute

Worldwide silicon wafer shipments decreased 9.6% quarter-over-quarter to 3,010 million square inches in the third quarter of 2023, a 19.5% drop from the 3,741 million square inches recorded during the same quarter last year, the SEMI Silicon Manufacturers Group (SMG) reported in its quarterly analysis of the silicon wafer industry.
“The decline in global silicon shipments continued as a result of the ongoing broad-based inventory correction cycle,” said Anna-Riikka Vuorikari-Antikainen, Chairman of SEMI SMG and Chief Commercial Officer at Okmetic. “Silicon wafer shipments for the computing, communications, consumer and memory markets saw the most pronounced declines due to a softening in demand and continuing economic uncertainties, while the automotive and industrial sectors were resilient during this period.”
Data cited in this release include polished silicon wafers, including those used as virgin test wafers, as well as epitaxial silicon wafers, and non-polished silicon wafers shipped by the wafer manufacturers to end users.
Silicon wafers are the fundamental building material for the majority of semiconductors, which are vital components of all electronic devices. The highly engineered thin disks are produced in diameters of up to 12 inches and serve as the substrate material on which most semiconductors are fabricated.
The SMG is a sub-committee of the SEMI Electronic Materials Group (EMG) and is open to SEMI members involved in manufacturing polycrystalline silicon, monocrystalline silicon or silicon wafers (e.g., as cut, polished, epi). The SMG facilitates collective efforts on issues related to the silicon industry including the development of market information and statistics about the silicon industry and the semiconductor market.
Testimonial
"Our marketing partnership with I-Connect007 is already delivering. Just a day after our press release went live, we received a direct inquiry about our updated products!"
Rachael Temple - AlltematedSuggested Items
Too Important to Ignore: Unpacking Advanced Packaging for AI Semiconductor – Report Summary
09/16/2025 | FuturumAdvanced packaging is becoming the cornerstone of AI semiconductor scaling, with 2.5D/3D integration, CoWoS, CPO, CoPoS, and SoW-X set to drive major gains in performance, bandwidth, and efficiency through the 2020s.
Advanced Packaging: Preparation is Now
09/15/2025 | Nolan Johnson, I-Connect007In this interview, Matt Kelly, CTO for the Global Electronics Association, and Devan Iyer, chief strategist of advanced packaging, define advanced electronics packaging and the critical nature of getting it right in the electronics manufacturing field. They share details from their white paper, “Advanced Packaging to Board Level Integration—Needs and Challenges,” and provide insight into how next-generation packaging will change the design, fabrication, and assembly of printed circuit boards, including the implications for final system assembly.
AMD’s Lisa Su to Receive Inaugural SEMI Silicon Medal at SEMICON West 2025
09/08/2025 | SEMISEMI, the industry association serving the global semiconductor and electronics design and manufacturing supply chain, announced the introduction of the annual SEMI Silicon Medal, a prestigious award that celebrates semiconductor industry icons driving innovation and excellence.
MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout
08/22/2025 | Cadence Design SystemsMorgan State University (MSU) recently received an Apple Innovation Grant, designed to support engineering schools as they develop their silicon and hardware technologies. The New Silicon Initiative (NSI) is designed to inspire and prepare students for careers in hardware engineering, computer architecture, and silicon chip design.
izmomicro Achieves Breakthrough in Silicon Photonics Packaging, Establishing India's Leadership in Advanced Semiconductor Integration
08/21/2025 | PRNewswireizmomicro, a specialized division of izmo Ltd., announced a major milestone in silicon photonics packaging, underscoring its role as a pioneer in India's semiconductor ecosystem and advancing the country's position in the global race toward next-generation data and AI infrastructure.