ASMPT Combines High-speed Chip Assembly Directly from the Wafer with SMT Placement in a Single Machine

Estimated reading time: 3 minutes

As automotive applications, 5G and 6G, smart devices and many others require ever more compact and powerful components, advanced packaging becomes one of the key technologies. With its new SIPLACE CA2 hybrid placement solution, market and technology leader ASMPT combines semiconductor and SMT production in a single machine that makes it possible to integrate the production of SiPs (system-in-package modules) directly into the SMT line. The SIPLACE CA2 processes both SMDs from tapes and dies taken directly from the wafer in a single step at speeds of up to 50,000 dies or 76,000 SMT components per hour with a precision of up to 10 microns @ 3 σ. The result: maximum flexibility, efficiency, productivity and quality paired with enormous savings in time, costs, floor space, and tape waste. The saving of 800 km of tape per year with 24/7 SiP production makes the SIPLACE CA2 a worthwhile investment.

In high-volume SiP manufacturing operations for products like smartphones and tablets, the SIPLACE CA2 takes some dies directly from the sawn wafer while other flip chips and parts such as passive components are picked up from tapes. In the past, this was generally done in two separate processes. With the new highly flexible and powerful SIPLACE CA2 platform, however, ASMPT integrates the processing of dies into the high-speed SMT line by taking them directly off sawn wafers.

“The SIPLACE CA2 brings together what belongs together in the SiP age, thus opening up new dimensions in advanced packaging,” explains Sylvester Demmel, Senior Product Manager at ASMPT SMT Solutions. “The highly flexible configuration and leaner processes create new opportunities, open up new markets and customer groups, and increase electronics manufacturers’ productivity while reducing their costs, thus delivering significant competitive advantages.”

Die buffer and parallelization solve speed problems

One of the main obstacles to the combined handling of SMT components and dies used to be the relatively slow process of fetching dies directly off the wafer. On wafers that are delivered sawed, the dies are affixed to a carrier film from which they must first be detached before they can be assembled – a process that is almost impossible to accelerate.

The SIPLACE CA2 solves this problem with a buffer storage module that works similar to a placement head and can hold 16 new dies (plus four on the flip unit) while the placement head itself is still placing SMDs. This separates and parallelizes the die pickups off the wafer from their placements on the substrate, thus bringing the machine’s placement performance close to that of the SMT world. In this way, the innovative solution processes up to 40,000 flip-chips or up to 50,000 chips in the die-attach process, or up to 76,000 SMT components from tapes per hour with a placement accuracy of up to 10 microns @ 3 σ.

Maximum flexibility for die processing

The SIPLACE CA2 has a wafer exchange system that holds up to 50 different wafers – a feature that has no equal in the industry. A wafer swap takes only 10 seconds. This advanced technology does not just reduce the manufacturer’s investment costs considerably, it also saves valuable space on the shop floor, thus creating room for more speedy machines and automated storage and transport solutions.

Cost-saving and sustainable

Collecting the dies directly off the wafer also eliminates the need to package the dies in tapes. Eliminating the taping material delivers several benefits. Depending on the production volume, the cost savings can run into the millions – for the taping material itself as well as for its storage and disposal. Taking the chips directly off the wafer also makes the production more sustainable because it avoids huge amounts of tape waste.

Full traceability and software integration

The full traceability of components that is already mandatory in many markets continues to pose major challenges in the world of semiconductors. This is where the SIPLACE technology delivers great benefits to manufacturers with its “full single-die-level traceability”, which logs for each die its pick-up position as well as its placement position on the board – automatically.

In addition, the SIPLACE software features speedy program and product changeovers, placement program portability to any machine of the same type, and fast and comprehensive substrate mapping. Many applications in the efficiency- and productivity-enhancing smart shop floor management suite WORKS are also available for the SIPLACE CA2 for things like setup verification, optimization, and logistics.

Combining the SIPLACE CA2 with high-precision and high-speed SIPLACE TX micron placement machine is especially attractive in SiP production environments. Both machines can be arranged on the same line and complement each other to deliver a maximum of precision, flexibility, and yield.

Open interfaces for the Intelligent Factory

In addition to the SECS/GEM interface, which is important for semiconductor production, the SIPLACE CA2 features the IPC-2591 CFX open communication standard, one of the basic prerequisites for implementing ASMPT’s Intelligent Factory concept. As a result, seamless data communication between the shop floor and the factory and enterprise levels can now be ensured also for the processing of dies.