Reliability Comparisons of FPBGA Assemblies Under Hot/Cold Biased Thermal Cycle

Estimated reading time: 2 minutes

Current trends in microelectronic packaging technologies continue in the direction of smaller, lighter, and higher density packages. The telecommunications industry and particularly mobile/portable devices have a strong need for lighter and smaller products. The current emerging advanced packaging (AP) technologies, including system-in-package (SiP) and 2.5D/3D stacked packaging, added another level of complexity and challenges for implementation. The AP covers a set of innovative technologies that package integrated circuits (ICs) to increase functionality, improve performance, and provide added value¹. In contrast, traditional packaging methods cover different I/O density and I/O pitch depending on the targeted application’s requirements, performance, and cost. The AP with heterogeneous integration added additional thermal challenges compared to a single die package².

For single-die packaging technologies, the density requirement led to a progression in ball-grid-array (BGA) packaging technologies implemented in early 2000. With increased I/O density and decreased package size, the new generation of fine pitch BGA (FPBGA) packages, such as chip scale packages (CSPs) are introduced. A variety of studies have been conducted examining the reliability of printed circuit board assemblies (PCBAs) using BGAs and FPBGAs^3-6. Recently, a guideline on BGA and die size BGA (DSBGA) was released for high-reliability applications with consideration of various environmental requirements for a number of NASA mission applications⁷. There are significant thermal cycle (TC) test data in the range of -55℃ and 125℃, or lower TC ranges, for commercial and even high-reliability applications, which is covered by IPC 9701⁸.

However, thermal cycle test results under extreme cold and cryogenic conditions, representative of deep-space mission applications, is rare. Tudryn et al.⁹, presented detailed thermal cycle evaluation for Martian environment including die attachment with wire bonds. Recently, Ghaffarian¹⁰ and Ghaffarian et al¹¹ compared the low temperature thermal cycles, including -110°C to 20°C for SnPb solder assemblies. The test results covered surface mount technology (SMT) packages including column grid array (CGA) to hand-soldered plated through-hole (PTH) ceramic pin grid array (PGA) assemblies.

To read the entire article, which originally published in the August 2024 issue of the SMT007 Magazine, click here.