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October Issue of Design007 Magazine: Partial HDI
October 8, 2024 | I-Connect007 Editorial TeamEstimated reading time: Less than a minute
Partial HDI refers to the targeted use of HDI, usually on one section of one layer of the board. It offers designers an avenue for escape routing from BGAs with a pitch of .5 mm or less, when a mechanically drilled plated through-hole is impossible. With HDI relegated to one layer of the board, fabricators can avoid the expense of sequential lamination cycles.
In the October issue of Design007 Magazine, our expert contributors provide a complete, detailed view of partial HDI. Most experienced PCB designers can start using this approach right away. But you need to know these tips, tricks and techniques first.
Suggested Items
Happy’s Tech Talk #37: New Ultra HDI Materials
02/03/2025 | Happy Holden -- Column: Happy’s Tech TalkSome new materials have been introduced in the past year for ultra high density interconnect (UHDI), a convenient title for developing high density technologies. They have received labels like semiconductor-like PCBs (SLPs), redistribution layers (RDL), flip-chip ball grid array (FCBGA), and interposers. The early 2000s saw the creation of these organic substrates for flip-chip IC packaging. The initial construction was composed of a BT core with build-up layers of the Ajinomoto Build-up Film (ABF)
SMTA UHDI Symposium 2025, Part 2: State of the Art
01/29/2025 | Marcy LaRont, I-Connect007A group of about 50 attended the second annual SMTA Ultra High Density Interconnect Symposium on Jan. 23, 2025. After a morning of technical presentations on challenges and solutions regarding UHDI technology, we gathered for a delicious Mexican buffet lunch and some networking before reconvening for an afternoon of more technical topics.
SMTA UHDI Symposium 2025, Part 1: Challenges and Solutions
01/28/2025 | Marcy LaRont, I-Connect007SMTA hosted its second annual Ultra High Density Interconnect Symposium, a conference on cutting-edge PCB technology, on Jan. 23, 2025, at the Peoria Sports Complex in Arizona. A highly pro-business state with a special affection for the tech sector, Arizona is home to the biggest Intel semiconductor fab in the United States and the new TSMC chip fab. With an intimate group of approximately 50 attendees, the SMTA event offered a great forum for learning, interactive discussion, and networking.
ACCM Launches CeleritasSF & CeleritasBU for Ultra-High-Speed PCBs
01/27/2025 | PRNewswireAdvanced Chip and Circuit Materials Inc. (ACCM), a US-based manufacturer of skew free, ultra-thin copper-clad laminates and dielectric prepreg materials used to fabricate high layer count PTH, Buildup and UHDI multilayer printed circuit boards (PCBs), announced the introduction of the CeleritasSF and CeleritasBU series of laminates and prepregs, which enable PCIe Gen 6 & 7 and data rates of 224 Gb/s per channel.
Elementary Mr. Watson: The Road Ahead—Advances in PCB Design Technology
01/23/2025 | John Watson -- Column: Elementary, Mr. WatsonThis year introduces a new generational group, likely to be dubbed Generation Beta, since Generation Alpha was born between 2010 and 2024 and is considered the first generation born in the 21st century. Generation Alpha grew up in a world dominated by smartphones, artificial intelligence, and rapid technological advancements. It is anticipated that Generation Beta will live to see the 22nd century.