SIA Commends Selections for CHIPS R&D Flagship Facilities

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The Semiconductor Industry Association (SIA) released the following statement from SIA President and CEO John Neuffer commending the selections for the first two CHIPS for America National Semiconductor Technology Center (NSTC) facilities. The first facility will focus on extreme ultraviolet (EUV) lithography research and will be located within NY CREATES’s Albany NanoTech Complex in New York. The second facility (Sunnyvale, CA) will serve as an administrative headquarters for the NSTC and host the Design Enablement Gateway. Together, these programs will advance semiconductor design, research, workforce development, investment, and collaboration for the U.S. semiconductor industry.

“This week’s announcements mark exciting milestones in the implementation of the critical R&D programs enacted in the bipartisan CHIPS and Science Act. EUV lithography research is an investment in American leadership at the leading edge. And, the Albany facility will democratize access to this extraordinary tool and enable NSTC research to commence in the next year, driving the mission to propel American chip innovation from day one.

“Natcast’s site in Sunnyvale, CA will establish a new hub at the heart of Silicon Valley for the next generation of R&D in chip design, electronic design automation (EDA), chip and system architecture, and hardware security. Moreover, the facility will advance core NSTC programs, including the Workforce Center of Excellence—building our industry’s most essential asset: an innovative and skilled workforce. We congratulate the Department of Commerce and Natcast for initiating these impactful programs and applaud their diligent efforts to continue driving American leadership in chips.”

These resources will be available to NSTC members and researchers. Natcast has opened NSTC membership and urges semiconductor companies, universities, nonprofits and research institutions, national labs, and government agencies to take part in shaping the future of U.S. semiconductor R&D leadership.