Trouble in Your Tank: Minimizing Small-via Defects for High-reliability PCBs
It’s Only Common Sense: 20 Lessons in 20 Years—A Career in Common Sense
The Marketing Minute: Staying Positive When the Market Isn’t
Effects of Advanced Packaging and Stackup Design
December 26, 2024 | I-Connect007 Editorial TeamEstimated reading time: 1 minute
Kris Moyer teaches several PCB design classes for IPC and Sacramento State, including advanced PCB design. His advanced design classes take on some really interesting topics, including the impact of a designer’s choice of advanced packaging upon the design of the layer stackup.
Kris shares his thoughts on the relationship between packaging and stackup, what PCB designers need to know, and why he believes, “The rules we used to live by are no longer valid.”
Kris, tell us how advanced packaging can impact stackup design. What challenges do designers need to be aware of?
Kris Moyer: With advanced packaging you usually need to use HDI or UHDI technology. This usually means sequential lamination. With sequential lamination you need to select materials that can survive multiple lamination thermal cycles.
When we were discussing advanced packaging and stackup design recently, you said, “The rules we used to live by are no longer valid.” Expand on that a little bit.
As I mentioned, your selection of materials is now further restricted by the need for materials that survive multiple lamination cycles. Additionally, since we are adding layers one at a time and need plating on all layers, not just the outer layers, the copper design is now more difficult. Also, since we are adding layers one at a time, we can now have some select instances of unbalanced Z-axis and still meet bow and twist. Furthermore, many of the ultra-thin dielectric layers used in HDI/UHDI are just resin-coated copper without any reinforcement, so CTE/FA can be more of an issue.
To read this entire conversation, which appeared in the December 2024 issue of Design007 Magazine, click here.
Share on:
Testimonial
"Our marketing partnership with I-Connect007 is already delivering. Just a day after our press release went live, we received a direct inquiry about our updated products!"
Rachael Temple - AlltematedSuggested Items
Elementary Mr. Watson: Routing Hunger Games—May the Traces Be Ever in Your Favor
08/26/2025 | John Watson -- Column: Elementary, Mr. WatsonI’d like to share a harsh truth, and I say this as a friend: PCB designers are often their own worst enemy. It’s rarely the complexity of the circuit, the last-minute changes from mechanical, the limited enclosure space, or the ever-expanding list of design rules that send projects to the dust heap of failed boards. More often, it's our own decisions, made too quickly and narrowly, and with too little foresight, that sabotage an otherwise good design.
Target Condition: Floor Planning Without a Floor
08/27/2025 | Kelly Dack -- Column: Target ConditionBy a show of hands, how many PCB designers have been asked to start a layout without a board outline, keep-out zones, or even height constraints? How many have had to work within a specific enclosure before the schematic was finalized? If this sounds familiar, you're not alone. Starting a PCB layout without critical constraints is like hiring an interior designer to buy furniture and carpet for a house you haven’t even purchased yet, or, even worse, trying to fit four bedrooms' worth of furniture in a one-room cabin.
I-Connect007 Editor's Choice: Five Must-Reads for the Week
08/22/2025 | Andy Shaughnessy, I-Connect007In this week’s roundup, we have a variety of articles covering design, manufacturing, sustainability, and, of course, tariff negotiations. We have a milestone anniversary to celebrate as well, with Dan Beaulieu about to publish his 1,000th column. When does Dan even sleep? Here’s to hoping that we have 1,000 more weeks of "It’s Only Common Sense."
New Episode Drop: MKS’ ESI’s Role in Optimize the Interconnect
08/26/2025 | I-Connect007In this latest episode, Casey Kruger, director of product marketing at MKS’ ESI, joins On the Line With… host Nolan Johnson to share how CO₂ laser technology delivers faster, more accurate vias in a smaller, more energy-efficient footprint.
PEDC Call for Abstracts Deadline Extended to Aug. 31
08/20/2025 | I-Connect007 Editorial TeamThe second Pan-European Electronics Design Conference (PEDC) will take place Jan. 21-22, 2026, in Prague, Czech Republic. The call for abstracts deadline has been extended to Aug. 31. Organized jointly by the German Electronics Design and Manufacturing Association (FED) and the Global Electronics Association (formerly IPC), PEDC serves as a European platform for knowledge exchange, networking, and innovation in electronics design and development.