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The Bleeding Edge: Inventing the 'VSHDIHTLCTEHF' Microcircuit

Sierra Micro Electronics has just completed six months of R&D on an exciting new technology: a Very Small, HDI, High-Thermal, Low CTE, High-Frequency (VSHDIHTLCTEHF) microcircuit.

The R&D board's specifications are:  

- Size: 1 inch by 1 inch   (25.4 mm x 25.4 mm )- Number of layers: 10    (metal core is two layers )- Line width: 1.2 mils  (28 microns)  - Space: 1.2  mils  (28 microns )- Total thickness: 18 mils (457 microns)  - Microvias: 10,000 over the 10 layers - Low CTE Metal Core: Copper Molybdenum Matrix Metal  - 7 mils thick   (170 microns )- Core Thermal conductivity: 180   W/moC- CTE: 6-8 ppm/oC - Number of clearance holes in core: 2200  - Microvia diameter: 3 mils (75 microns),  copper filled - Dielectric thickness: 1.2 mils  (30 microns)- Frequency: 4 Ghz - Dk of dielectric layers: 3.8 - Tg: 175* C

The customer's designer presented Sierra Micro Electronics with the above challenge. Originally the specifications were a 10-layer board with 2-3 watts per sq inch of power, high frequency of 4 GHz, very low CTE of 6-.8 and an overall thickness of 18 mils. And I shouldn't omit that the lines and spaces were 1.2 mils, while the 10,000 microvias were 3 mils in diameter.  

The initial material selection and technology development took three months to solve with many of the specifications in conflict. To dissipate three watts per square inch meant we needed a very thermally conductive core to spread the heat with thousands of solid thermal copper vias. The extremely low CTE of 6-8 required us to look at high-modulus, low-CTE laminates such as carbon, invar, tungsten, molybdenum aramid and Kevlar.

The killer was the overall thickness of 18 mils, which compromised the thickness and thermal ability of the core to control heat dissipation and still leave room for 8 more layers. The core also had to control CTE at a very low 6-8 PPM/oC and not be too thin for processing--all at the same time. 

A second difficulty was the 10,000 microvias only 3 mils in diameter.  The problem was designing a landing pad size that was small enough to allow for laser and panel movement tolerances, yet be small enough to not take up extra space. We settled on a 5-mil pad with a 3-mil microcopper-filled via to satisfy both requirements.

The thermal conductivity required us to fill all the microvias connecting the 4 layers of stacked thermal microvias through to the metal core. When it came time to specify the metal core, again the specifications were in conflict; we needed a very high thermal conductivity yet a very low CTE and it had to be drilled, filled, then drill the microvias through the fill material and full copper plate. Invar was out because of the low thermal conductivity; carbon fiber laminate is not able to take either the heat or the drill bits breaking into the adjacent drilled holes. The manufacturers of the carbon laminate stated the thermal conductivity of the product was as listed at 320 w/moC, however, it was for the carbon fibers only. When you add the resin to hold the fibers together, which they do, the thermal conductivity falls to 17-30 w/moC.  I wish companies would not try to fool us. 

Tungsten would work as well as aluminum silica for the thermal requirements, and CTE, but both were too hard to drill and route.  We finally decided on a very little known molybdenum copper matrix metal, which had a low CTE of 5, a high Young's modulus, high thermal conductivity of 180 w/moC and is available as a composite metal with a thickness of 7 mils (177 microns).  We managed to get a few hundred hits per dill bit, which was acceptable considering the specifications.

The eight top layers of dielectric material was the next challenge. It had to have a low dK of 3.8 or better, be very thin at 1.2 mils (30 microns), yet feature a low modulus so it would not raise the CTE of the sum combination of the base core and the dielectrics.  A search of all available laminates showed a few with the properties we needed but none fit exactly; they would be okay on dK but be too thick, or else they'd be okay on thickness but not a high enough Tg. A special dielectric film was made for us by a large supplier. After many tests and changes the combination worked; we were able to laminate a 1.2 mil (30 microns) film with very high voltage rating of 4,000 volts per mil, with 3-micron foil. 

We plated up to oz copper for the final line thickness, and we filled all the microvias with copper.  Considerable problems were encountered in the metal core with the drill bits encroaching on each other, which left slivers. We invented ZIG ZAG microvias to enable the position of the through-holes in the core to be moved around from the original fixed BGA pitch on the top layer to increase spacing. ZIG ZAG microvias allow each layer of stacked microvias to move a bit sideways. Over four layers you can move a microvia about 5-7 mils sideways, which is enough to move the core drill position to create a thicker web between drill locations on the core. Figure 1.  ZIG ZAG Microvias

The ZIG ZAG microvias allow you to move the stack of microvias over a little on each layer, through the core, and then come back again to the desired position on the bottom of the circuit.   A special thin solder mask was created by Taiyo ink, and we will be working with Taiyo in the future to increase the resolution of photoimageable solder mask for our next generation of microcircuits

The next big R&D job is to actually learn how to make these little monsters in production.

Ken Bahl is the CEO of Sierra Proto Express.  

Robert Tarzwell is the Director of Technology for Sierra Proto Express.