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Global PCB Connections: Understanding the General Fabrication Process—A Designer’s Hidden Advantage
In collaborations between PCB designers and fabricators, you can avoid most design issues if designers understand what happens after they hit "Gerber export." As a designer, you’re focused on signal integrity, part placement, layer stackups, and the countless specs from marketing, engineering, and procurement. The best designers, whose boards flow through the fab shop with minimal questions and faster turns, have taken the time to understand the general fabrication process.
Whether you’re fresh out of school or transitioning from a different part of the electronics world, learning how your board becomes a board helps prevent costly revisions, builds mutual respect with your fab partners, and sets you up for success in more complex designs like HDI, rigid-flex, or designs with microvias and stacked interconnects.
Here’s an overview of what happens once your files land on the fabricator’s server.
1. CAM Engineering: Translating Design Into Reality
After receiving your data as Gerbers, ODB++, or IPC-2581, the first stop is the CAM (Computer Aided Manufacturing) department. (Note: Do yourself and your fabricator a favor: Output only one format. Sending various formats only creates more work and slows down the process.) CAM engineers check for manufacturability: annular rings, clearances, drill-to-copper spacing, image alignment, and stack-up compatibility. Designers who understand what CAM teams look for, avoid misaligned drill files, unsupported via-in-pad usage, and unclear stack-ups. This stage often results in engineering queries (EQs). The fewer you get, the faster your job moves.
Tip: Always include fabrication notes that specify IPC class, controlled impedance requirements, and material preferences. If you don’t know the difference between 370HR and FR4, default to IPC slashsheets. Don’t spec something the shop may not carry.
2. Inner Layer Processing: Imaging the Core
For multilayer boards, fabrication begins with the inner layers. These are typically copper-clad laminates that are cleaned, coated with photoresist, and then imaged with UV light through a photo tool or direct imaging tool. The exposed photoresist is developed away, and the underlying copper is etched to create your traces.
This is the first area where DFM choices affect yield. If you use narrow traces or tight copper features (say, 3/3 mil line/space or below), etching tolerances become more critical. Add asymmetrical trace widths, and you have a recipe for shorts or opens.
Tip: Keep trace widths and spacing reasonable unless there's a performance-based reason not to. Don’t design to minimums; use minimums only when necessary. Symmetrical inner layers make for happier lamination processes.
3. Lamination: Building the Sandwich
Once inner layers are etched and inspected, the stack is laminated together with prepreg (the adhesive dielectric layer). The stack goes into a lamination press under heat and pressure, curing the prepreg and bonding all the layers into one solid PCB. Stack-up matters here. Prepreg choices impact dielectric performance, impedance, and whether the board will survive reflow. Designers pushing the edge with high-speed or high-layer-count designs must work closely with fabricators to get this right.
Tip: Work with your fabricator to build a stack-up around standard materials and thicknesses. Custom stack-ups add cost and complexity, so use them only when necessary.
4. Drilling: Making Connections
After lamination holes are drilled for vias, plated through-holes, and component leads. Drill registration is critical, especially as features get smaller. Standard mechanical drills can go down to about 6-8mil in diameter. Below this, you’re in laser-drilled microvia territory. This is where understanding the difference between through-hole, blind, and buried vias matters. You can't drop a blind via in your CAD tool and assume the shop can build it. Blind and buried vias require sequential lamination or other drilling techniques and cost, both in time and dollars.
Tip: Stick to through-holes unless your design requires otherwise. If you need blind or buried vias, clearly document the via structure and sequence. Use separate via diameters to identify blind or buried vias.
5. Hole Metallization: Laying Down the Copper
Once drilled, the holes are desmeared (especially important for multi-lam processes) and plated with a thin layer of electroless copper, followed by electroplating to build up the wall thickness. This process turns drilled holes into conductive pathways. This is a critical reliability point. Insufficient hole wall cleaning or low plating leads to failures, especially in thermal cycling. On the other hand, overplating can cause problems in dense areas. Via fill (especially with via-in-pad) and copper wrap on the pad can also be relevant for advanced designs.
Tip: If you’re designing for Class 3 (high reliability), specify minimum plating thicknesses and consider whether vias need to be filled and capped.
6. Outer Layer Imaging and Etching: Routing the Top and Bottom
Much like the inner layers, outer layers are imaged and etched. The key difference is that the plating step has already added copper, so etch compensation becomes more critical. The outer layers often carry more complex routing, denser BGA fanouts, and fine-pitch components.
Again, design for manufacturability helps here. Try not to push minimums because your CAD tool allows it. Every mil matters on the outer layers.
Process Note: Electrolytic Cu plating may occur before or after the imaging process based on the design and/or your fabricator’s capabilities.
Tip: Watch for solder mask clearance issues, especially around fine-pitch pads and BGAs. Ensure your padstack matches your fab shop’s expectations.
7. Solder Mask and Surface Finish: Protect and Connect
After etching, solder mask is applied to protect the board and prevent bridging during assembly. Openings are created for pads and vias as defined in your data. Then comes the surface finish: HASL, ENIG, ENEPIG, OSP, or other options to prevent Cu oxidation and preserve solderability.
This is where your design meets reality. Poor solder mask registration can cause shorts. A mismatched surface finish can lead to assembly issues or shelf-life problems.
Tip: Unless specified by assembly or environmental requirements, ENIG is a safe, widely compatible finish. If you need wire bonding, specify ENEPIG or soft bondable Au. Always define which vias should be tented, covered, or left open.
8. Final Fabrication: Routing, Electrical Testing, and Inspection
Finally, boards are routed or punched from the panel, beveled, electrically tested for continuity and shorts, and visually inspected. Some may go through AOI, X-ray inspection, or cross-sectioning depending on class level. Some boards are electrically tested in production panel form just before routing, while others may be tested after routing. What matters is documentation. Clear fab drawings and notes ensure the application of the correct edge clearances, routing outlines, and scoring details. If you don’t define it, you’re letting someone else guess.
Tip: Include fabrication drawings with dimensioned outlines, board arrays (if applicable), and finished thicknesses. Help your fab partner help you.
The Takeaway: Better Designers Build Better Boards
Designers don’t need to become fabricators, but understanding the basics of PCB fabrication can save you time, money, and frustration. The more you understand what’s happening on the shop floor, the better you’ll be able to prevent downstream issues. As you move into more advanced designs like HDI, flex circuits, stacked vias, and embedded components, this foundational knowledge becomes even more critical.
The fabricator is your partner. The more you speak their language, the more smoothly your boards will flow from idea to reality. If you're a new designer, call your local board shop and ask for a tour and a DFM review on your next layout. Sit in on a CAM session if you can. An hour of education there is worth more than a semester of theory because ultimately, the process isn’t simply about being a better designer; it’s about building better boards.
Markus Voeltz Director of Business Development at CEE PCB, is a recognized expert in developing businesses.
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