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Trouble in Your Tank: Understanding Interconnect Defects, Part 1
This month, I’ll address interconnect defects (ICDs). While this defect continues to rear its ugly head, don’t despair. There are solutions, most of which center on process control and understanding the relationship of the chemistry, materials, and equipment. First, though, let’s discuss ICDs.
Interconnect Defects
As circuit boards become more complex with multiple layers, finer lines and spaces, and vias with smaller diameters and greater aspect ratios, the possibility of an interconnect defect looms large. If small hole voiding issues are not enough to keep everyone hopping, interconnect or interplane separation surely will. Unlike voids, where, if detected in time, the panels can be reprocessed, it is impossible to rework the ICD defect.
ICDs are not always detected by Quality Control, mainly because ICDs are rarely catastrophic failures. Rather, constant thermal cycling or the high temperatures of assembly operations cause a weakened interconnect to separate. Many engineers expect that performing one or two solder floats on plated coupons removed from panels will provide a sufficient QC check. Unfortunately, this often allows the problem to go undetected until it is far too late. An example of an ICD is shown in Figure 1.
A slight separation becomes detectable after the coupon undergoes two solder floats at 550°C for 10 seconds. If not seen by cross-section, the panel will easily pass electrical test. However, because of the weakness in the interconnect, continued thermal stresses and vibrations of the PWB will most likely lead to an open circuit. If you’re unsure whether the defect is present, regrind and polish the potted coupon, then inspect the ICD. Do not etch the specimen, otherwise, a line of demarcation can be visible with electroless copper deposits, which can lead you to conclude that it is a true ICD. It is imperative that un-etched coupons be used to detect the presence or absence of the defect.
An ICD is not confined to just the interplane. Blind vias can also exhibit a separation of the plated copper from the capture pad. Interconnect defects (IP separation) generally exhibit these underlying characteristics:
- Occurs during the stress of thermal shocks such as soldering. This creates expansion in the Z-axis and places strain on the copper in the hole wall.
- Most often seen on the first inner layer from either side of the board. (i.e., on a 12-layer board, the defect can be seen on layers 2 and 11).
- The weakest bond breaks first.
- Under-cured boards are most susceptible.
- Affected by board construction, PWBs with more resin, less copper, and lower Tg materials show more expansion in the Z-axis.
- ICDs are often accompanied by a hole-wall pullaway, but not always.
There are several causes of interplane separation, making this defect so difficult to pinpoint and eliminate. To confuse the issue further, one must first determine which of the three types of IP it is. The three types of IP separation are:
- Type 1: Separation of the electroless copper deposit from the interconnect
- Type 2: Separation of the electrolytic copper deposit from the electroless copper deposit, but the electroless remains on the post
- Type 3: Cohesive failure of the electroless whereby the electroless copper deposit separates from itself
The three types of IP failure have their own inherent causes. We will discuss Type 1 in this column and Types 2 and 3 next month. Figure 2 shows a more pronounced view of Type 1 ICD. One can see the electroless copper deposit adhering to the electro-deposited copper, not to the interconnect.
Why is Type 1 the most common and often the most difficult to mitigate? Generally, it’s because there is significant internal stress in the electroless copper deposit, causing it to pull away or separate from the interconnect post.
So, ensure there is no drill smear remaining on the post. This will show as a separation. However, don’t confuse smear with Type 1 ICD. Type 1, in its true fashion, is caused by several factors that may be interacting in such a way as to exacerbate the defect. Remember that the weakest bond breaks first.
Generally, Type 1 ICDs can be attributed to the following:
- “Invisible” drill smear not removed by the desmear process. Check parameters if using alkaline permanganate or plasma. Is the drilling process creating more smear than normal because of dull drill bits, faster in-feed rates, poor quality entry and back-up material, or because drill bits are remaining in the hole for an excessive amount of time?
- The micro-etch in the electroless copper pre-plate line does not sufficiently roughen the copper surface to provide adequate anchoring sites for the copper deposit.
- Excessive dwell time in the catalyst or inadequate tin removal in the acceleration step leaves a barrier on the copper interconnect. Anything that weakens the bond between the copper deposit and the interconnect can cause separation.
- Drag-in of cleaners into the various process tanks or poor rinsing due to insufficient dwell time. Rinse water quantity and/or quality can cause Type 1 ICDs.
- Electroless copper deposit exhibits inherent stress. An excessively high deposition rate typically causes this. The primary cause of the stress is the amount of copper micro-inches deposited per minute. Operate the process within its designed parameters. Any change in the process that results in the electroless being deposited at a higher-than-normal rate can cause the Type 1 ICD.
A good rule is that if the electroless copper process is designed to deposit 40–50 microinches in 30 minutes and the deposit is somewhere in the 70–100-microinch range, then there is a problem with the copper being deposited much too fast. This will cause the copper grains to “re-orient,” leading to stress in the deposit. The stress can only be relieved by the deposit pulling away from the interconnect.
Think about process control and understand all variables, both mechanical and chemical, that can cause the process to drift out of control. Next month, I’ll discuss Type 2 and 3 ICDs.
This column originally appeared in the October 2025 issue of PCB007 Magazine.
More Columns from Trouble in Your Tank
Trouble in Your Tank: Implementing Direct Metallization in Advanced Substrate PackagingTrouble in Your Tank: Minimizing Small-via Defects for High-reliability PCBs
Trouble in Your Tank: Metallizing Flexible Circuit Materials—Mitigating Deposit Stress
Trouble in Your Tank: Can You Drill the Perfect Hole?
Trouble in Your Tank: Yield Improvement and Reliability
Trouble in Your Tank: Causes of Plating Voids, Pre-electroless Copper
Trouble in Your Tank: Organic Addition Agents in Electrolytic Copper Plating
Trouble in Your Tank: Interconnect Defect—The Three Degrees of Separation