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PCBAIR Unveils 8-Layer Glass Core PCB Manufacturing for Next-Gen AI & HPC

12/08/2025 | PRNewswire
PCBAIR announced the launch of its advanced 8-layer Glass Core PCB manufacturing capabilities, combining proprietary Through Glass Via (TGV) technology with multi-layer redistribution layers (RDL).

Coherent Expands Silicon Carbide Platform with 300mm Capability to Support Growing Demand of AI and Datacenters

12/04/2025 | Globe Newswire
Coherent Corp., a global leader in photonics, announced a major milestone in its next-generation 300mm silicon carbide (SiC) platform to address increasing thermal efficiency demands in AI datacenter infrastructure.

Indium Expert to Tackle Reliability Challenges in AI and High-Performance Computing at EPTC 2025

11/27/2025 | Indium Corporation
Indium Corporation Research Metallurgist Huaguang Wang, Ph.D., will deliver a presentation at the 27th IEEE Electronics Packaging Technology Conference (EPTC 2025). The conference will be held December 2-5, 2025, in Singapore.

Connect the Dots: The Future of Designing for Reality—Electroless Copper

11/26/2025 | Matt Stevenson -- Column: Connect the Dots
On a recent episode of I-Connect007’s On the Line With… podcast, we discussed electroless copper deposition—depositing a thin copper layer into the through-holes and vias of what will eventually become a printed circuit board. Specifically, it is a chemically catalyzed deposition of copper, mainly to the epoxy inside the holes (as well as on the entire surface of the board). Electroless differs from electrolytic in that electrolytic deposition relies on electricity. 

Rubin’s Cableless Architecture and ASIC High-Layer HDI Designs Push PCBs to the Center of AI Compute Power

11/20/2025 | TrendForce
TrendForce’s latest research points out that AI server design is undergoing a fundamental structural shift. From NVIDIA’s Rubin platform featuring a fully cableless architecture, to hyperscalers’ in-house ASIC servers adopting ultra-high-layer HDI designs, PCBs are no longer merely passive circuit carriers—they are becoming a core enabler of compute performance.
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