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Beyond IPC-2152: Creating Technology-specific Current-carrying Capacity Design Charts Using Thermal Modeling
January 29, 2026 | Mike Jouppi, Thermal Management LLCEstimated reading time: 1 minute
Designers commonly size traces using online calculators based on IPC-2221 or IPC-2152 charts, selecting width and thickness for a given current and allowable temperature rise (ΔT). Consideration is given to parallel conductors, although this is not a practical evaluation method for most designs. An important aspect of trace heating, especially groups of traces, is the power dissipated by the conductors. Unfortunately, the power dissipation or a method for accounting for power losses in the traces/conductors or planes is not straightforward.
The thermal design of a PCB must consider all components, their power requirements, board material, board stackup, mounting conditions, environmental conditions, and trace/conductor power losses. PCB thermal analysis considers both steady state and transient conditions. We will discuss steady-state trace heating.
It's a common practice to determine a trace size based on current, steady-state temperature rise, and trace cross-sectional area. The issue is that the IPC chart temperature rise is much higher than what would be found for most designs. Additionally, trace power is not initially assessed, leaving a significant amount of power, especially in high-current designs, to be managed later in the design cycle.
Consider a previous PCB design used to create design charts for that PCB technology. A process for creating technology-specific design charts (TSDC) can be used to develop conductor sizing design charts that account for all PCB thermal design parameters. This provides a lot of new insights into your board technology. This process for generating PCB-specific current-capacity charts is documented in U.S. Provisional Patent 63/875,465.
It’s possible to evaluate the varying current-carrying capability around different areas of the board that have more or less copper. Design charts can be made for many different environmental conditions, such as on a lab bench or for worst-case operating conditions. A previous design is not necessary; it simply minimizes iterations and provides the designer with a lot more useful information.
To continue reading this article, which originally appeared in the January 2026 I-Connect007 Magazine, click here.
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EMAC Returns with Bright Electronics Manufacturing Challenge 2026
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A Designer's Focus on High Density
04/30/2026 | Marcy LaRont, I-Connect007 MagazineVern Solberg is a distinguished member of the Global Electronics Association Raymond E. Pritchard Hall of Fame and has served as chair or vice chair of many committees, developing technical standards and implementation guidelines, including the IPC-7090 series, which focuses on design for manufacturing and reliability for electronic assemblies. He’s a long-time contributor to Design007 Magazine, and he conducted a half-day tutorial at APEX EXPO 2026, where he addressed 2D, 2.5D, and 3D packaging and ultra-high density hybrid bond interconnect. I caught up with Vern at the show and asked about his pivot from addressing more standard design challenges to his focus on high-density circuits.
Zuken Launches GENESYS 2026 to Broaden Access and Improve MBSE Workflows
04/28/2026 | ZukenZuken announced GENESYS 2026, the latest version of its model-based systems engineering platform, with updates designed to improve performance, expand access to model-based information, and enhance the day-to-day modeling experience for engineering teams.