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Fine Lines and Spaces with Half-Etch Processes

Introduction

It is all about circuit density. If your customer or customers are pushing the envelope with respect to greater circuit densities, how are the fabricators adapting to these requirements? I do not want to oversimplify the task at hand, but there are a number of things one can do to improve the yields on finer lines. These include laser direct imaging, semi-additive processing, use of ultra-thin foils, and special processes. Another and perhaps lesser known application is termed “half-etch.” Here the fabricator utilizes a specially formulated copper etching process to remove a minimal amount of copper. The goal is to remove the copper uniformly, but not completely from the surface as is performed during the final etch-process step. For example, by reducing 1 ounce copper foil (35 microns) down to ½-ounce or ¼-ounce, one maintains the adhesion of the original foil. In addition, the fabricator is presented with a much thinner substrate foil that can be easily etched during the final etch process. There are several good reasons for this approach:

1. Minimization of undercut and increase of fine line yields

2. Ease of handling as opposed to working with ultra-thin copper foils

3. Adhesion of the half-etched foil is usually greater than the adhesion of the ultra-thin foil to the resin materials as well as the plated copper in the SAP (semi-additive process).

In subtractive etching, as the copper is etched down, there is lateral removal of the copper as well.

If one can minimize the amount of copper foil that must be etched (either through thinner copper foils, semi-additive processing, copper foil half-etch) undercut can be minimized and finer lines and spaces achieved.

It is well understood that the three most fundamental metrics of organic interconnections and substrates are imaging feature sizes, hole formation technology and size, and the plating types and thicknesses used for interconnections. These same parameters have been used for nearly four decades to quickly quantify the capability of a fabricator to profitably produce traditional boards. The ability to image conductor lines and, perhaps even more important, the insulating airspace between them, is considered a key characteristic. With surface mount components, a dramatic decrease in plated via hole diameter requirements occurred and, as a result, via holes have become simple vertical interconnections. Now, under competition from laser drilling, both drill bit and machine technology have driven mechanical holes’ capability much smaller. When microvia technology was introduced in the mid-1990s, high-density interconnect really took hold into the mainstream of printed circuit fabrication.

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Editor's Note: This article originally appeared in the January 2015 issue of The PCB Magazine.