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Connect the Dots: Designing for Reality—Pattern Plating

10/16/2024 | Matt Stevenson -- Column: Connect the Dots
In the previous episode of I-Connect007’s On the Line with… podcast, we painted the picture of the outer layer imaging process. Now we are ready for pattern plating, where fabrication can get tricky. The board is now ready to receive the copper traces, pads, and other elements specified in the original CAD design. This article will lay out the pattern plating process and discuss constraints in the chemistries that must be properly managed to meet the customer's exacting manufacturing tolerances.

PCB007 Magazine October 2024: Alternate Metallization Processes

10/16/2024 | I-Connect007 Editorial Team
Traditional electroless copper and electroless copper immersion gold have been primary PCB plating methods for decades. But alternative plating metals and processes have been introduced over the past few years as miniaturization and advanced packaging continue to develop taking us into new directions. In this issue of PCB007 Magazine, we examine the impact of alternate metallization methods giving a glimpse into how and when we will arrive at 'destination metallization'.

Partial HDI: A Complete Solution

10/10/2024 | I-Connect007 Editorial Team
We recently spoke with IPC instructor Kris Moyer about partial HDI, a process that’s recently been growing in popularity. Partial HDI allows designers to escape route out from tight-pitch BGAs on one layer, where a mechanically drilled plated through-hole is not an option, while avoiding the complexity and expense of sequential lamination cycles. As Kris explains, this process doesn’t add much to the cost, and it’s fairly straightforward. But there are some competing signal integrity and fabrication requirements to contend with. We asked Kris to walk us through this process.

Trouble in Your Tank: Interconnect Defect—The Three Degrees of Separation

10/01/2024 | Michael Carano -- Column: Trouble in Your Tank
It has been well documented that, with a very expensive and complex printed circuit board, thermal and mechanical excursions often find weaknesses. A lack of robustness and poor process control often leads to the exploitation of those weaknesses. An interconnect defect (ICD) often goes undetected until the printed circuit board reaches the final assembly stage or undergoes multiple thermal cycles, including interconnect stress tests or thermal shock. It is impossible to rework the ICD defect. But unlike voids, if detected in time, the panels can be reprocessed.

Connect the Dots: Designing for Reality—Outer Layer Imaging

09/26/2024 | Matt Stevenson -- Column: Connect the Dots
Welcome to the next step in the manufacturing process—the one that gets the chemical engineer in all of us excited. I am referring to outer layer imaging, or how we convert digital designs to physical products. On a recent episode of I-Connect007’s On the Line with… podcast, we explained how the outer layer imaging process maps the design’s unique features onto the board.
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