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Advancement of SPI Tools to Support Industry 4.0 and Package Scaling
August 6, 2019 | A. Prasad, L. Pymento, S.R. Aravamudhan, and C. Periasamy, Intel Corp.Estimated reading time: 13 minutes
![](https://iconnect007.com/application/files/2616/3131/7957/Pymento-Thumb-080619.jpg)
ABSTRACT
During the past decade, consumer electronics and personal digital devices, in particular, have shrunk in size but have added significant computing power and capabilities. To enable this digital revolution, the SMT industry has driven towards thinner BGA packages with finer ball pitch and smaller solder ball sizes.
Thinner and finer pitch packages are increasingly prone to warpage with less SMT process yield margin, which require intricate stencil design with varying solder paste volume deposits. Increased functionality has driven footprints to be asymmetrical with SMD (solder masked defined) pads, which are typically smaller with circular and oval layouts. This has fueled a need for highly accurate and smaller solder paste deposits for increased SMT yield margin and solder joint reliability. Additionally, with the introduction of Industry 4.0 and Smart Factory solutions, it is imperative that data collection must be accurate to influence the appropriate forward and backward feedback information for monitoring, tuning, and automatic adjustments. There is concern that the current industry wide inline solder paste inspection (SPI) tools are operating as gross inspection tools instead of capable metrologies.
This paper evaluates the current state of inline SPI tools from multiple vendors for solder paste measurement accuracy and capability. A measurement capability analysis (MCA) was carried out against a golden metrology tool across a range of volume deposits. Results from the study will highlight the accuracy bias deviations and repeatability of current SPI tools against low volumes deposits and showcase the current gap in the SMT industry.
Introduction
Figure 1: Industry package form factor roadmap (reproduced with permission from ASM).
The SMT industry and Intel’s roadmap are driving to thinner and smaller packages with finer pitch and smaller ball sizes, as shown in Figure 1. This also translates to significantly smaller volume solder paste deposits largely below 250 cubic mils, as shown in Table 1 (highlighted in red). Table 1 lists calculated theoretical volumes for small pad sizes. As BGA solder ball pitch decreases, the contribution to the solder joint from solder paste increases (as a function of solder joint integrity). At 0.4-mm pitch, printed solder paste contributes ~28% of the total solder joint volume post reflow, approaching 30% at 0.3-mm pitch, as shown in Figure 2. Data shown in Figure 2 is obtained from theoretical calculations.
Table 1: Solder paste volumes for fine-pitch packages.
Controlling and accurately measuring solder paste volume is becoming more and more critical as pitch is reduced further. Also, thinner packages prone to warpage need highly accurate solder paste volume deposits to increase yield margins.
Typical SMT industry upper and lower thresholds for solder paste volume as measured by SPI tools (±50%) are wide and will mask accuracy with a false pass. To illustrate this point further, consider an SPI measurement scenario shown in Figure 3.
For a target solder paste volume of 50 cubic mils, the SPI lower and upper control limits of ±50% will be 25 cubic mils (LCL) to 75 cubic mils (UCL). Let us consider an SPI accuracy of ±20%. For an actual deposit of 30 cubic mils and factoring the accuracy bias error, the measured value of deposit by SPI can be anywhere from 24–36 cubic mils. This is shown by two arrows from the actual value. If SPI reads 24 cubic mils, it will be below LCL and report it as insufficient. This will lead to a false call and print downtime and prompt an unnecessary change in the printer setting.
Figure 2: BGA pitch vs. printed solder paste contribution to the total solder joint volume post reflow (%).
Currently, inline SPI tools in the industry are marketed as an inspection tool instead of a metrology-grade tool. Frequently, gage R&R studies using NIST or equivalent calibrated standards are marketed based on their repeatability and reproducibility, while accuracy bias is not reported. The smart factory (Industry 4.0) initiative will drive a need for higher inline SPI accuracy once fully deployed across SMT. Again, this drives a critical need for accurate inline SPI measurement, especially for low-solder paste volume deposits.
In our literature survey, we also found that very few reports exist on the topic. Shea, et al. [1] reported significant differences in SPI accuracy. According to their study, SPI machines always returned values lower than the weight test results. A few other reports and white papers [2–4] from SPI vendors—such as Vi TECHNOLOGY, CyberOptics, and Marantz Electronics—emphasize the need for SPI accuracy. Chandru, et al. [5] also reported on SPI accuracy and suggested a better offline scanning confocal microscope for more accuracy below 200 cubic mils.
With the previously mentioned drivers in mind, we set out to gauge the current industry-wide state of inline SPI tools vis a vis solder paste measurement accuracy of low-volume deposits. We tested inline SPI tools from multiple vendors (A through E), as shown in Table 2. For vendor A, two tools were evaluated: in-house version tool A and an improved version of the tool labeled A+. Total combined market share of the vendors in Table 2 equates to >80% of the North American SPI tools market [6].
Figure 3: Solder paste measurement scenario for low-volume deposit considering accuracy bias of SPI.
Methodology
Test Vehicle Preparation and Characterization
To compare SPI measurement accuracy from different SPI vendors, we created a golden reference board (GB). GB was first thoroughly characterized in-house using a golden reference tool (GT). The GB design is shown in Figure 4. It is a 10-layer, 32-mil PCB and consists of ball grid array (BGA), passive, and quad flat package (QFP) pad structures. Pad structures for all three components are a mix of solder mask defined (SMD) and non-solder mask defined (NSMD) pads. BGAs are designed for a 3-mil stencil print from AR 0.75 to AR 0.33 and air gap of 4 mils and 5 mils.
Table 2: Inline SPI tool vendors and tool camera resolution.
To begin with, the bare GB was characterized in the GT. Next, using a DEK Galaxy printer, we printed the GB using a 3-mil, stainless steel, laser-cut nanocoated stencil. SAC305 Type 5 solder paste was used to print on the GB. Solder paste deposits were dried by heating at 150°C for 20 minutes. This was done to drive out volatiles and solidify the shape of deposit for multiple measurement use. After print and drying, SPI was performed using in-house inline SPI tool from vendor A and the GT. Locations are selected from BGA, passive, and QFP pad structures. Pad structure, with and without traces, was also included (where available) in comparison. Solder paste volume on the PCB ranged from 0–900 cubic mils.
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