Cadence Palladium Z2 Enterprise Emulation Platform Accelerates Microchip’s Data Center Solutions SoC Development
January 20, 2022 | Cadence Design Systems, Inc.Estimated reading time: 1 minute
Cadence Design Systems, Inc. announced that Microchip has deployed the Cadence Palladium Z2 Enterprise Emulation Platform for the development of their next generation ASIC products targeting high performance and scalable SoC solutions for data centers. The Palladium Z2 platform provided Microchip with 2X better emulation capacity, enabling more simultaneous users and 1.5X greater performance gains versus the previous generation emulator while maintaining full compatibility with existing emulation setups and use models.
The Palladium Z2 platform provides an early model of the ASIC for Microchip’s software and firmware development teams, which is essential to meeting their goal of successful first-pass silicon and software integration. Leveraging the congruency of the Palladium and Cadence Protium™ Enterprise Prototyping databases, Microchip saved several weeks of FPGA prototyping bring-up and hardware and software integration debugging time. In addition to providing the same RTL databases, the Palladium and Protium dynamic duo offers design environments that share the same in-circuit and virtual interfaces, making the debug process completely seamless and transparent to software and hardware engineers.
“At Microchip, we develop highly complex and secure SOC solutions for leading cloud data center providers that require robust verification platforms that can easily handle our multi-chip systems,” said Riad Ben-Mouhoub, senior technical staff engineer at Microchip. “The common compile flow offered by the Palladium and Protium dynamic duo, combined with unified peripherals, allows us to distribute verification workloads freely between the two platforms. With the new Palladium Z2 platform, the 2X higher gate capacity and 1.5X faster runtime performance allowed us to implement our largest multi-chip systems efficiently to meet our challenging time-to-market and quality requirements. Our migration from the Palladium Z1 platform to the Palladium Z2 platform was extremely smooth and only required a recompilation of our current databases.”
The Palladium Z2 Enterprise Emulation Platform and Protium X2 Enterprise Prototyping system are part of the Cadence verification full flow and support the company’s Intelligent System Design™ strategy. The Cadence verification full flow is comprised of core engines and verification fabric technologies that increase verification throughput and design quality, fulfilling verification requirements for a wide variety of applications and vertical segments.
Testimonial
"Advertising in PCB007 Magazine has been a great way to showcase our bare board testers to the right audience. The I-Connect007 team makes the process smooth and professional. We’re proud to be featured in such a trusted publication."
Klaus Koziol - atgSuggested Items
Accelerating Embedded Innovation: Orthogone Becomes Texas Instruments Design Partner
09/17/2025 | PRNewswireOrthogone Technologies Inc., a leader in advanced embedded systems and FPGA development, is proud to announce its official designation as a Texas Instruments (TI) Design Services Partner.
BLT Joins Microchip Partner Program as Design Partner
09/17/2025 | BUSINESS WIREBLT, a U.S.-owned and operated engineering design services firm announced it has joined the Microchip Design Partner Program.
Staying on Top of Signal Integrity Challenges
09/16/2025 | Andy Shaughnessy, Design007 MagazineOver the years, Kris Moyer has taught a variety of advanced PCB design classes, both online IPC courses and in-person classes at California State University-Sacramento, where he earned his degrees in electrical engineering. Much of his advanced curriculum focuses on signal integrity, so we asked Kris to discuss the trends he’s seeing in signal integrity today, the SI challenges facing PCB designers, and his go-to techniques for controlling or completely eliminating SI problems.
American Standard Circuits to Exhibit and Host Lunch & Learn at PCB West 2025
09/17/2025 | American Standard CircuitsAnaya Vardya, President, and CEO of American Standard Circuits/ASC Sunstone Circuits has announced that his company will once again be exhibiting at PCB West 2025 to be held at the Santa Clara Convention Center on Wednesday, October 1, 2025.
ASM Technologies Limited signs MoU with the Guidance, Government of Tamilnadu to Expand Design-Led Manufacturing capabilities for ESDM
09/15/2025 | ASM TechnologiesASM Technologies Limited, a pioneer in Design- Led Manufacturing in the semiconductor and automotive industries, announced signing of Memorandum of Understanding (MoU) with the Guidance, Government of Tamilnadu whereby it will invest Rs. 250 crores in the state to expand its ESDM related Design-Led Manufacturing and precision engineering capacity. ASM Technologies will acquire 5 acres of land from the Government of Tamilnadu to set up a state-of-the-art design facility in Tamil Nadu's growing technology manufacturing ecosystem, providing a strong strategic advantage and long-term benefits for ASM.