Laser-cut Electropolish and Laser-cut Nanocoat Stencils: A Comparison of Finish Performance for Complex Designs

Estimated reading time: 7 minutes

Miguel A. Lara, Celestica, examines solder paste deposition for designs with miniature/fine-pitch and large components. This paper presents the results of solder paste deposition with an alternate post-process operation to SMT stencils that is claimed to improve paste release and consistency. There are two analyzed outputs: solder paste brick height and volume. Variation, normality, and process capability analysis is measured for electroformed and nanocoated laser-cut stencils in identical operations.

Some new handheld communication devices challenge the paste printing process because they commonly deploy very small devices like 0201 chip components as well as 0.5-mm- and finer-pitch microBGA devices. These components are mounted along with surface mount connectors or RF shields with coplanarity issues that require taller deposits of solder paste. Stencil apertures for miniature devices and balls require a stencil thickness in the 50 to 75 µm (2-3 mils) range for effective paste transfer, whereas the RF shield and SMT connector should have at least 150 µm (6 mils) paste height.

Aperture Design and Creation

Aperture design contributes to paste deposit quality, as do stencil material and the thickness in which apertures are tooled. The aperture geometry is in great part dependent on the component pitch and land pattern used on the PCB. Pitch often dictates what stencil thickness is required for adequate paste release. This can be the differentiator between a good and a bad paste print (Figure 1). For a complete description of solder paste printing step and variables that affect print quality, read The Solder Paste Print Step.

Figure 1. Inadequate prints (incomplete, residues, shorts, etc.)

There are several accepted methods for stencil manufacture, such as etch, laser-cut, and electroform. For a description of how each method is performed, read Stencil Aperture Creation.

    Figure 2. Nanocoated stencil aperture. The coating covers the surrounding PCB contact area of the aperture.5 Figure 3. Laser stencil with electropolish.

In a chemical etching process, rosin is photo-developed onto a metal foil, which is then submerged in an acid bath to wet the exposed areas and etch the steel, often leaving a rough aperture wall. This type of tool manufacturing method is one of the least expensive; however, due to the resulting aperture geometry and walls, it is not suitable for fine-pitch printing requirements. Laser-cut stencils3 can have aperture widths as small as 0.004″ with an accuracy of 0.0005″, suitable for ultra-fine-pitch component printing. Laser-cut stencils also produce ragged edges because the vaporized metal is transformed into metal slag during the cutting process. This can cause paste clogging. Smoother walls can be produced by micro etching.

Etching manufacturing methods tend to leave a rough surface on the aperture walls of the stencil. A post-processing step is often suggested to reduce aperture wall surface tension and improve paste release. Results include finer material removal from aperture walls, and post-process starting-aperture sizes must be adjusted to the post-processing treatment employed, as their finished size will change.

New Finishing Techniques

Electropolishing is a popular post-processing finish method. Figure 3 shows scanning electron microscope (SEM) images of a cross-sectioned laser-cut stencil finished with electropolish. A newer type of finishing — nanocoating — is the focus of this study. The nanocoat is a stencil finishing process applied to a laser-cut, electropolished stainless steel stencil. This additive is deposited onto the PCB contact side of the stencil and in the aperture walls, to help improve the stencil’s paste release characteristics via reduced adhesion forces (surface tension) between solder paste and stencil.

Comparing Electropolishing and Nano-coating

For this experiment, Celestica used a six-layer FR-370HR, 11.81 × 9.45″, 69-mil-thick test vehicle with ENIG surface finish. This test vehicle has pads for 3 microBGA36s, 1 CSP196 and 1 12-mm PoP305 (all of 0.5-mm pitch), as well as various SMT placements ranging from 0201 to 0805, QFNs, SOICs, etc. No placements will be performed on the test vehicles.

  Figure 4. Locations of interest.

Tests were printed with SAC305 on a DEK 265GSX printer using a 45° squeegee attack angle and stainless-steel squeegees. Post-print inspection was carried out on a Cyberoptics SE300 SPI system.

Equipment set-up and operating parameters were constant for each test. The variables were a laser-cut stencil with electropolish finishing versus a laser-cut stencil with nanocoating (both with 4-mil foil). The same aperture geometries were used on both tools. Celestica printed the PCB, measured paste deposits, washed the board via automated washer, then repeated 32 times. This was performed on the electroformed and nanocoated stencils equally. Paste height, area, and volume were recorded for all printed apertures.

Fine-pitched device (0.5-mm BGA) locations are the focus. Most production sites leverage on the verification of paste height as a process indicator; therefore, that part of the analysis will be covered in this study. Paste volume information is also collected and reviewed.

Raw data results are available from the author.

Solder Paste Deposition Results

Laser-cut with electropolish. The normality check indicates that the distribution is not normal, with 4.941-mil mean and 0.3392 standard deviation. The analysis indicates that the mean resides at 4.941 mils and the control limits should set between 4.227 and 5.656 mils. To assess the capability of the process, specification limits were established based on the stencil thickness: 3.5 mils for the lower and 5.5 for the upper specification limit. The analysis reveals a resulting Cp of 1.4 and Cpk of 0.78.

An aperture’s theoretical volume is land area × paste height, 78.54 × 4 in this study. In analysis, we find that the mean resides at 434.7 with 44.2 standard deviation. As shown in Figure 9, the mean and control limits show a broad range of variation.

To review the process capability for consistent volume deposit, we’ll establish the specification limits to be 75% paste release (a reduction of 25% of the deposited paste brick due to aperture wall retention on the lower specification limit.) This equals 267 mils3 and we’ll allow 25% of excess paste release on the overall volume setting the USL at 392 mils3. This results in a Cp of 1.03 and a negative Cpk due to a skewed distribution that did not meet the specification limits.

    Figure 5. Normality check for height on laser-cut electropolished. (Not normal) Figure 6. X-bar, Range chart for height on laser-cut electropolished stencil.     Figure 7. Process capability for laser-cut electropolished paste height. Figure 8. Normality testing of volume for laser-cut electropolished stencil. (Not-normal)     Figure 9. X-bar, Range chart for volume on laser-cut electropolished. Figure 10. Process capability for laser-cut electropolished paste height.

Laser-cut with nanocoating. The normality check indicated that the distribution is not normal, with the mean at 4.805 and 0.2852 standard deviation. The analysis indicates that the mean resides at 4.805 mils, with tighter control limits set between 4.375 and 5.236 mils. To test process capabilities, the same specification limits were used as in the first phase with the electroformed stencil: 3.5 mils for the lower and 5.5 for the upper specification limit. The analysis reveals a resulting Cp of 2.32 and Cpk of 1.61.

The same theoretical volume is used, since the aperture geometry is the same for both stencils. First, data normality is verified. The mean resides at 317.6 and the standard deviation is 16.89. As shown in Figure 15, the mean and control limits show a narrow range of variation.

Figure 11. Normality check for height on laser-cut nanocoated. (Not normal)

Figure 12. X, Range chart for height on laser-cut nanocoated stencil.     Figure 13. Process capability for laser-cut nanocoated paste height. Figure 14. Normality testing of volume for laser-cut nanocoated stencil. (Not normal)     Figure 15. X, Range chart for volume on laser-cut nanocoated apertures. Figure 16. Process capability for laser-cut nanocoated paste volume.

Height analysis (paste height) Electropolished Nanocoated Mean 4.94 4.81 UCL 5.66 5.24 LCL 4.23 4.38 Standard deviation 0.34 0.29 Cp  1.40 2.32 Cpk 0.78 1.61

To evaluate volume deposit consistency, the same theoretical specification limits (267.03515 mils3 and 392.69875 mils3) are used. This results in a Cp of 2.45 and a Cpk of 1.97 indicating a robust, capable process.

Conclusion

This solder paste deposition analysis of electroform and nanocoating technologies reveals that volumetric specification limits for the selected aperture geometry are hard to meet for a laser-cut stencil with electropolishing. This is evidenced by the volume deposits histogram: a skewed distribution reveals a difficult-to-control deposit. On a laser-cut nanocoated stencil, the volume mean closely approximates to the theoretical value, indicating a more centered distribution, with a considerably tighter standard deviation. This suggests that nanocoating is a more capable process for stencils printing miniature and large solder bricks on one circuit board.

ACKNOWLEDGEMENTS 

The author would like to thank Rey Calma, SMT operations manager, Celestica; Tam Nguyen, Johnnie So, SMT equipment technical support, Celestica; Tan Le, production supervisor, Celestica; Thilo Sack, engineering principal, Celestica; and Carmina Läntzsch, 

Volumetric analysis (paste volume) Electropolished Nanocoated Mean 434.7 317.6 UCL 495.9 343.3 LCL 373.5  291.9 Standard deviation 44.20 16.89 Cp 1.03 2.45 Cpk (-0.69) 1.97 customer service, LaserJob GmbH, for their work on this experiment.

REFERENCES:1. Burr, D.C. “1999 Solder Paste Printing Guidelines for BGA and CSP Assemblies,” SMT, January 1999, pg. 70-72.2. “Printing solderpaste onto PCBs,” http://www.siliconfareast.com.3. Coleman, William, Ph.D., “Stencil Technology and Design Guidelines for Print Performance,” Circuits Assembly, March 2001.4.Prasad, Ray, Surface Mount Technology: Principles and Practice.5. LaserJob GmbH reference document.

Miguel A. Lara, process and test development engineering advisor, Celestica Inc., San Jose, CA 95138, may be contacted at malara@celestica.com.

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