Global Citizenship: Cultivating Cross-border Partnerships With Integrity
Nolan’s Notes: Moving Forward With Confidence
The Knowledge Base: Beyond the Badge—Why Membership Matters More Than Ever
Indium's Joe Bahou to Present at SMTA San Diego Chapter Meeting
February 23, 2017 | Indium CorporationEstimated reading time: 1 minute
Indium Corporation's Joe Bahou, Technical Sales Support Engineer, West Coast, will present at SMTA San Diego's Chapter Meeting on March 8 in Poway, California.
Bahou will present Minimizing Voiding in Bottom Terminating Components, which provides an introduction to QFN challenges, determining void criteria, design of experiments (DOE), results, void control using Solder Fortification, and conclusions.
Bahou supports Indium's advanced SMT materials, fluxes and engineered thermal materials to customers on the west coast of the USA. He provides comprehensive technical advice in the selection, use and application of solder paste, fluxes, and solder alloy fabrications to customers in the electronics assembly industry. Bahou is based in Huntington Beach, California, and has more than 16 years of experience in electronics assembly manufacturing, including hands-on experience in SMT production. Bahou has a bachelor's degree in mechanical engineering from the University of Massachusetts Lowell. In addition, he has worked on the development of 01005 chip component placement onto a printed circuit board.
About Indium Corporation
Indium Corporation is a premier materials manufacturer and supplier to the global electronics, semiconductor, thin-film, and thermal management markets. Products include solders and fluxes; brazes; thermal interface materials; sputtering targets; indium, gallium, germanium, and tin metals and inorganic compounds; and NanoFoil®. Founded in 1934, Indium has global technical support and factories located in China, Malaysia, Singapore, South Korea, the United Kingdom, and the USA.
For more information about Indium Corporation, visit www.indium.com.
Share on:
Suggested Items
Preventing Surface Prep Defects and Ensuring Reliability
06/10/2025 | Marcy LaRont, PCB007 MagazineIn printed circuit board (PCB) fabrication, surface preparation is a critical process that ensures strong adhesion, reliable plating, and long-term product performance. Without proper surface treatment, manufacturers may encounter defects such as delamination, poor solder mask adhesion, and plating failures. This article examines key surface preparation techniques, common defects resulting from improper processes, and real-world case studies that illustrate best practices.
Breaking Silos with Intelligence: Connectivity of Component-level Data Across the SMT Line
06/09/2025 | Dr. Eyal Weiss, CybordAs the complexity and demands of electronics manufacturing continue to rise, the smart factory is no longer a distant vision; it has become a necessity. While machine connectivity and line-level data integration have gained traction in recent years, one of the most overlooked opportunities lies in the component itself. Specifically, in the data captured just milliseconds before a component is placed onto the PCB, which often goes unexamined and is permanently lost once reflow begins.
BEST Inc. Introduces StikNPeel Rework Stencil for Fast, Simple and Reliable Solder Paste Printing
06/02/2025 | BEST Inc.BEST Inc., a leader in electronic component rework services, training, and products is pleased to introduce StikNPeel™ rework stencils. This innovative product is designed for printing solder paste for placement of gull wing devices such as quad flat packs (QFPs) or bottom terminated components.
See TopLine’s Next Gen Braided Solder Column Technology at SPACE TECH EXPO 2025
05/28/2025 | TopLineAerospace and Defense applications in demanding environments have a solution now in TopLine’s Braided Solder Columns, which can withstand the rigors of deep space cold and cryogenic environments.
INEMI Interim Report: Interconnection Modeling and Simulation Results for Low-Temp Materials in First-Level Interconnect
05/30/2025 | iNEMIOne of the greatest challenges of integrating different types of silicon, memory, and other extended processing units (XPUs) in a single package is in attaching these various types of chips in a reliable way.