-
-
News
News Highlights
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueAll About That Route
Most designers favor manual routing, but today's interactive autorouters may be changing designers' minds by allowing users more direct control. In this issue, our expert contributors discuss a variety of manual and autorouting strategies.
Creating the Ideal Data Package
Why is it so difficult to create the ideal data package? Many of these simple errors can be alleviated by paying attention to detail—and knowing what issues to look out for. So, this month, our experts weigh in on the best practices for creating the ideal design data package for your design.
Designing Through the Noise
Our experts discuss the constantly evolving world of RF design, including the many tradeoffs, material considerations, and design tips and techniques that designers and design engineers need to know to succeed in this high-frequency realm.
- Articles
- Columns
- Links
- Media kit
||| MENU - design007 Magazine
Estimated reading time: 1 minute

Beyond Design: When Legacy Products No Longer Perform
As IC die sizes continue to compact due to demand for smaller and faster technology, and as switching speeds continue to improve, rise and fall times are creeping down into the sub-nanosecond realm, a territory previously reserved for microwave engineers. This relentless shrinking trend that perpetuates Moore’s Law can create a huge problem for legacy designs as faster switching intensifies signal integrity issues. Over the years, as logic drivers have continued to switch faster and faster, problems with ringing, crosstalk and electromagnetic emissions (EMI) have become progressively worse.
It is a common quandary that established products that have worked flawlessly for years suddenly stop performing reliably, due to a new batch of ICs that is used in the latest production run. The cause of this problem is rise time shrinkage. Figure 1 illustrates the consequences of three different rise times for the same clock frequency.
Figure 1: Increased ringing with faster rise times (simulated in HyperLynx).
This example brings home two very important points. Firstly, for a given layout, faster switching produces spurious signals exhibiting excessive overshoot and ringing. This problem is unavoidable. It can only be prevented, to some extent, by improving the layout and routing, reducing the number of loads and/or adding terminators. Secondly, IC manufacturers are not always doing us a favor when they begin shipping "new and improved'' logic circuits. When substituted into a legacy design, the increase in speed may buy nothing but headaches.
From the perspective of an IC manufacturer, shrinking a die is a winning proposition because the new chip is almost certain to meet or exceed its published specifications at a lower cost. However, from the perspective of the designer, shrinking a die, in an existing product design, can be a daunting prospect, because the new rising and falling edges are almost certain to switch considerably faster.
Faster edge rates mean reflections and signal quality problems. So, even when the package hasn’t changed and the clock speed hasn’t changed, a problem may exist for legacy designs. The enhancements in driver edge rates have a significant impact on signal quality, timing and crosstalk. This also has a direct impact on radiated emissions.
To read this entire column, which appeared in the August 2017 issue of The PCB Design Magazine, click here.
More Columns from Beyond Design
Beyond Design: The Metamorphosis of the PCB RouterBeyond Design: Radiation and Interference Coupling
Beyond Design: Key SI Considerations for High-speed PCB Design
Beyond Design: Electro-optical Circuit Boards
Beyond Design: AI-driven Inverse Stackup Optimization
Beyond Design: High-speed Rules of Thumb
Beyond Design: Integrated Circuit to PCB Integration
Beyond Design: Does Current Deliver the Energy in a Circuit?