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Altium Sponsors Seven Teams at 2018 SpaceX Hyperloop Pod CompetitionJuly 2, 2018 | PRNewswire
Estimated reading time: 3 minutes
Altium, a leading provider of electronics design systems for PCB design, today announced its sponsorship of seven teams at SpaceX’s upcoming 2018 Hyperloop Pod Competition, which will take place on Sunday, July 22, 2018 at SpaceX’s headquarters in Hawthorne, California. Now in its third installment, the competition aims to accelerate the development of functional prototypes and encourage up-and-coming university and innovator teams to design and build the best transport Pod for high speed ground transportation. A sponsor since the first competition in 2015, Altium is proud to provide tools to help enable the next generation of electronics engineers.
SpaceX held its first-ever Hyperloop Pod Competition in 2015 to give global teams the opportunity to design and build a Hyperloop Pod to bring to life Elon Musk’s vision of a high-speed ground transportation. Last year’s winner, WARR Hyperloop of Technical University of Munich (currently sponsored by Altium), reached a pod speed of 201 mph. This year’s competition will be judged solely on one criterion: maximum speed with successful deceleration (i.e., without crashing). Additionally, all Pods must be self-propelled. Since its inception, the competition has continued to inspire electrical engineering students around the world to push the boundaries of innovation.
“Sponsors to us are absolutely our lifeline,” said Johnny Kohlbeck, operations director at Badgerloop. “If we did not have the support that industry sponsors like Altium provide, we would not be here today. There are a number of PCB software tools out there yet Altium has one of the most advanced tools,” said Vaughn Kottler, electrical engineer at Badgerloop. “The fact that you can check your entire schematic against your layout is just awesome and helps ensure that you are able to bring your concept to life.”
Altium plays an important role in these competitions by providing teams with the professional software they need to design circuit boards that allow the Pods to function. This past year, Altium’s sponsored team, Badgerloop, used Altium Designer to design boards like the STM nucleo microcontroller board and shield that they could reuse as new iterations of pods were developed. To streamline the workflow, they developed a subversion network which allowed them to work closely and collaboratively on PCB designs during the summer when team members resided across two continents and three time zones.
Altium is sponsoring seven teams who are attending the 2018 Hyperloop Pod Competition. The teams hail across five countries in the U.S., The Netherlands, Switzerland, Germany and Scotland. The teams include Delft Hyperloop of Delft University of Technology; HyperXite of University of California, Irvine; Swissloop of ETH Zurich; WARR Hyperloop of Technical University of Munich; UW Hyperloop of University of Washington; Badgerloop of University of Wisconsin–Madison and HYPED of University of Edinburgh.
"At Altium, we believe the bold and innovative ideas from this competition may one day lead to the realization of the potential Hyperloop’s concept has to transform ground transportation,” said Ted Pawela, Chief Operating Officer at Altium. "We are excited to see the successes of these young and talented electrical engineering students and are proud to have helped them in our own small way."
Altium LLC (ASX:ALU) is a multinational software corporation headquartered in San Diego, California, that focuses on electronics design systems for 3D PCB design and embedded system development. Altium products are found everywhere from world leading electronic design teams to the grassroots electronic design community.
With a unique range of technologies Altium helps organisations and design communities to innovate, collaborate and create connected products while remaining on-time and on-budget. Products provided are ACTIVEBOM, ActiveRoute, Altium Designer, Altium Vault, Altium NEXUSTM, Autotrax, Camtastic, Ciiva, CIIVA SMARTPARTS, CircuitMaker, CircuitStudio, Codemaker, Common Parts Library, Draftsman, DXP, Easytrax, EE Concierge, NanoBoard, NATIVE 3D, OCTOMYZE, Octopart, P-CAD, PCBWORKS, PDN Analyzer, Protel, Situs, SmartParts, TASKING range of embedded software compilers and Upverter.
Founded in 1985, Altium has offices worldwide, with US locations in San Diego, Boston and New York City, European locations in Karlsruhe, Amersfoort, Kiev, Munich, Markelo and Zug, and Asia Pacific locations in Shanghai, Tokyo and Sydney. For more information, click here.
Cadence’s digital and custom/analog flows are certified on the Intel 18A process technology. Cadence® design IP supports this node from Intel Foundry, and the corresponding process design kits (PDKs) are delivered to accelerate the development of a wide variety of low-power consumer, high-performance computing (HPC), AI and mobile computing designs.
Intel Corp. (INTC) launched Intel Foundry as a more sustainable systems foundry business designed for the AI era and announced an expanded process roadmap designed to establish leadership into the latter part of this decade.
Keysight, Intel Foundry Partner to Certify Electromagnetic Simulation Software for Intel 18A Process Technology02/22/2024 | BUSINESS WIRE
Keysight Technologies, Inc. announces that the RFPro electromagnetic (EM) simulation software, part of the Keysight EDA Advanced Design System (ADS) integrated tool suite, is now certified by Intel Foundry for design engineers targeting Intel 18A process technology.
I-Connect007 has just released the latest episode of its podcast series, On the Line with..., which focuses on designing for reality in the electronics industry. In this episode, host Nolan Johnson talks with ASC Sunstone VP/Manager Matt Stevenson about CAD tool features and data formats that help designers make better decisions and transfer better designs to manufacturing.
Intel Foundry Services (IFS) and Cadence Design Systems, Inc. (Nasdaq: CDNS) announced they have expanded their partnership and entered into a multiyear strategic agreement to jointly develop a portfolio of key customized IP, optimized design flows and techniques for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery.