-
- News
- Books
Featured Books
- smt007 Magazine
Latest Issues
Current IssueWhat's Your Sweet Spot?
Are you in a niche that’s growing or shrinking? Is it time to reassess and refocus? We spotlight companies thriving by redefining or reinforcing their niche. What are their insights?
Moving Forward With Confidence
In this issue, we focus on sales and quoting, workforce training, new IPC leadership in the U.S. and Canada, the effects of tariffs, CFX standards, and much more—all designed to provide perspective as you move through the cloud bank of today's shifting economic market.
Intelligent Test and Inspection
Are you ready to explore the cutting-edge advancements shaping the electronics manufacturing industry? The May 2025 issue of SMT007 Magazine is packed with insights, innovations, and expert perspectives that you won’t want to miss.
- Articles
- Columns
- Links
- Media kit
||| MENU - smt007 Magazine
Novel Approach to Void Reduction Using Microflux Coated Solder Preforms
July 26, 2018 | By A. Lifton, P. Salerno, J. Sidone and O. Khaselev, Alpha Assembly SolutionsEstimated reading time: 8 minutes
Figure 5: Solder paste print design for QFN.
Components and solder preforms were placed from tape and reel using a production component placement machine with twin-head and 2N force. Samples were then inspected for skew prior to reflow in a production belt driven reflow oven per the reflow profiles defined in Figure 3. Finally, upon reflow, every component was subjected to X-ray voiding analysis capturing its largest single void size and total void percent under the thermal pad.
Results and Discussion
Voiding analysis was performed on all test assemblies. Statistical software was used to compare voiding performance and processing factors to generate a main effect plot to understand QFN voiding. The plot of the main effects on the voiding of the built assemblies are shown in Figure 6. Reviewing data, it was observed that no significant difference was observed between the two surface finishes (ImmSn and ImmAg) evaluated in this study. A very small effect of the reflow profile type was observed when all data was analyzed.
Figure 6: The main effects on voiding (%) – overall plot.
As expected, the lower voiding percentage was achieved with a high soak reflow profile compare to the straight ramp. Typically, higher soak profile allows more outgassing of volatiles during reflow, which could result in lower voiding. Reflow in nitrogen atmosphere resulted in lower voiding. Higher voiding levels were observed on the larger QFN component with thermal pad 5.4 x 5.4 mm. The results for the small and medium sized LCS and QFN packages were similar even though components’ thermal pads were very different (3.6 x 3.6 mm and 2.1 x 2.1 mm). Assemblies without vias and with through hole vias produced the least amount of voiding overall; whereas, plugged vias showed higher voiding level. The biggest effect contributing to the reduction in voiding was the use of the solder paste and preform (PF+paste) configuration versus solder paste only (SPO) configuration.
The solder paste only configuration was used as a benchmarking factor for the remainder of the analysis. The average voiding for the contributing factors for SPO configuration shown in Figure 7. The resultant voiding was approximately in 22% average range. ImmSn board finish and the high soak profile marginally drove to lesser voiding. Reflow atmosphere had very little impact on the voiding results overall. Unplugged vias were the most problematic of the three vias design in this study.
Figure 7: The main effects for SPO configuration.
Focusing on the results for PF+paste configuration only, an average voiding of 9% was measured. The overall average voiding for PF+paste configuration was more than two times lower relative to the SPO configuration. Figure 8 shows the main effect of various parameters on the voiding of the PF+Paste configuration. Unlike the SPO configuration, the primary contributor to voiding in the PF+Paste configuration was the reflow atmosphere. Reflow in nitrogen reduces voiding nearly to 5%. Clear correlation with component size and voiding performance was observed. Voiding levels of about 12% were observed on the larger QFN component with thermal pad 5.4 x 5.4 mm. Reduction in the size of the thermal pad down to 3.6 x 3.6 mm reduced voiding level down to around 9%. As expected, the smallest package with the thermal pad of 2.1 x 2.1 mm showed the lowest voiding level and it was about 5%. Like SPO configuration, assemblies with unplugged vias were the most problematic and produced higher voiding levels compared to another pad design.
Earlier conducted studies were undertaken to understand the effects of micro-flux coated solder preforms and voiding for bottom termination components (BTC). In the last several years a lot of advancement was achieved in flux chemistry development to improve voiding performance significantly. In the previous voiding studies it was identified that the higher preform-to-paste volume ratio on the pad contributed to lower voiding, specifically in nitrogen. It is evident that the increased solder volume from the preforms plays a critical role in void reduction.
To read the full version of this article, which was published in the June 2018 issue of SMT007 Magazine, click here.
Visit I-007eBooks to download your copies of Alpha micro eBook today:
The Printed Circuit Assembler’s Guide to… Low-Temperature Soldering
Suggested Items
Advancing Aerospace Excellence: Emerald’s Medford Team Earns Space Addendum Certification
06/30/2025 | Emerald TechnologiesWe’re thrilled to announce a major achievement from our Medford, Oregon facility. Andy Abrigo has officially earned her credentials as a Certified IPC Trainer (CIT) under the IPC J-STD-001 Space Addendum, the leading industry standard for space and military-grade electronics manufacturing.
Magnalytix and Foresite to Host Technical Webinar on SIR Testing and Functional Reliability
06/26/2025 | MAGNALYTIXMagnalytix, in collaboration with Foresite Inc., is pleased to announce an upcoming one-hour Webinar Workshop titled “Comparing SIR IPC B-52 to Umpire 41 Functional & SIR Test Method.” This session will be held on July 24, 2025, and is open to professionals in electronics manufacturing, reliability engineering, and process development seeking insights into new testing standards for climatic reliability.
IPC Rebrands as Global Electronics Association: Interview With Dr. John W. Mitchell
06/22/2025 | Marcy LaRont, I-Connect007Today, following a major announcement, IPC is embracing the rapid advancement of technology with a bold decision to change its name to the Global Electronics Association. This name more accurately reflects the full breadth of its work and the modern realities of electronics manufacturing. In this exclusive interview, Global Electronics Association President and CEO Dr. John W. Mitchell shares the story behind the rebrand: Why now, what it means for the industry, and how it aligns with the organization’s mission.
Global Electronics Association Debuts; New Name Elevates IPC’s 70-Year Legacy as Voice of $6 Trillion Electronics Industry
06/25/2025 | Global Electronics AssociationToday begins a new chapter for IPC as it officially becomes the Global Electronics Association, reflecting its role as the voice of the electronics industry. Guided by the vision of “Better electronics for a better world,” the Global Electronics Association (electronics.org) is dedicated to enhancing supply chain resilience and promoting accelerated growth through engagement with more than 3,000 member companies, thousands of partners, and dozens of governments across the globe.
I-Connect007 Editor’s Choice: Five Must-Reads for the Week
06/20/2025 | Andy Shaughnessy, I-Connect007It’s been a busy week in this industry, and we have news and articles from the PCB design, fabrication and assembly communities. Some of this news is out of this world. We may be losing the high ground—the really high ground. Columnist Jesse Vaughan explains how the U.S. seems to be falling behind in space, and how this could affect our ability to defend ourselves in the future. We have an update on the U.S.-China tariff talks, which seem to be moving forward, though sometimes at a snail’s pace.