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October 17, 2018 | Emilie Jolivet, YOLE DÉVELOPPEMENTEstimated reading time: 2 minutes
The smartphone is one of the high value-add products that carries a very high demand for miniaturization. Customers expect larger screens, cameras with high resolution, and various other functions, in lighter and thinner phones. In 2017, Apple requested a new “board,” a substrate-like PCB (SLP), for iPhones. This has resulted in a technology transition for the PCB manufacturers and the need to invest in a modified semi-additive process (mSAP). New competitors were also attracted to this field: IC substrate manufacturers who originated the mSAP technology.
As a result, there were high capital expenditures among the SLP suppliers for Apple. This was followed by Samsung; the Galaxy S9, released in early 2018, has also adopted SLP technology, and similar high capital investments were made by some Korean PCB manufacturers. Additionally, increasingly more PCB and IC substrate manufacturers that were not in Apple and Samsung’s supply chain are joining the competition of fabricating SLPs.
Starting with the adoption of SLP late in 2017, the volume is expected to grow from 27 million units in 2017 to 440 million units by 2023 with a CAGR of 59.4%. The SLP revenue in 2017 is estimated to be $190M and will grow to $1.4B in 2018, then $2.2B by 2023 with a CAGR of 51%.
The interest in decreasing the feature size for a smartphone board is due to the demand for thinner but more functional smartphones. With increasingly more functions added, along with larger screens, the power consumption becomes a critical point. In the volume of a smartphone, the battery takes up most of the space. As the feature sizes on the board decrease, more integration can be achieved in a fixed area. Starting from iPhone 5s, Apple has gradually decreased the PCB area of the iPhones compared to the total smartphone area. Until the latest iPhone X, they have decreased 3% of the area while adding more functions and increasing the battery capacity. In the meantime, iPhone X not only adapted SLP but also stacked two SLPs like a sandwich to further increase integration in a fixed area.
This surface reduction was enabled by the increase of density and reduction of interconnection.
The semiconductor industry’s trends are affecting the semiconductor package and package-to-board interconnect level. PCB traditionally serves as the interconnection of the chips and the final product, but nowadays it is also an integration solution. SLP is one of the answers today to the scaling demand while also responding to the functional roadmap.
SLP is so-named because this “board” has blurred the definition between a PCB and an IC substrate. Although usually fabricated by different technologies, the main difference between a PCB and an IC substrate is the feature sizes, especially line and space (L/S). Traditionally a PCB or even HDI board has feature sizes greater than 30/30 mm; an IC substrate, on the other hand, has L/S that is often >15/15 mm. Nevertheless, SLP has reached L/S that is smaller than 30/30 mm, and this has defined the name for SLP as it is a PCB that has the feature sizes close to that of an IC substrate.
Traditionally, PCBs are fabricated using a subtractive process that requires etching the preexisting copper-clad laminate (>5 mm thick- ness). This often results in over-etching that cannot be compensated for afterwards.
This article originally appeared in the September 2018 issue of PCB007 Magazine, click here.
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