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Suggested Items

DFM Mistakes Designers Make When Moving to ELIC

07/20/2026 | Anaya Vardya, American Standard Circuits
The transition from HDI to every layer interconnect (ELIC) is where the DFM gap between design intent and fabrication reality is most visible. Several common misconceptions appear consistently in the data packages we review at ASC. The most common ELIC design mistake mirrors what we generally see in first-time UHDI builds: using process minimums everywhere because they appear on a capability chart. In ELIC, this is especially consequential. If only one region truly requires aggressive geometry, say, a fine-pitch BGA escape, the rest of the design should preserve margin. Relaxing non-critical areas makes the overall build more manufacturable without sacrificing the dense region that drives the stackup.

Beyond Design: Skip-layer Routing—The Waveguide Structure That Makes 224G Possible

07/09/2026 | Barry Olney -- Column: Beyond Design
As data rates climb from 112G PAM4 toward 224G PAM4 and beyond, electronics designers are discovering that traditional stripline and microstrip geometries are no longer sufficient. The physics simply break. Rise times are now in the single‑digit picosecond range, loss budgets are measured in millimeters, and even tiny discontinuities can collapse a PAM4 eye.

Every Layer Interconnect: The Promise, the Pain, and the Practical Limits

07/02/2026 | Anaya Vardya, American Standard Circuits
Every layer interconnect (ELIC) is an architectural statement about how a PCB is built, signaling a fundamental shift in how we think about routing density, vertical interconnect, and the relationship between design and fabrication. To understand what ELIC solves, you have to understand what it replaces. Traditional HDI construction uses a rigid core with sequential build-up layers on one or both sides:configurations such as 2-4-2 or 3-2-3.

Base Material Properties and Microvia Reliability

07/01/2026 | Ed Kelley, Victory Giant Technology
The drive toward higher circuit density is challenging PCB manufacturers and their supply chains alike, with base materials as a critical foundation for complex designs. HDI designs present specific challenges and requirements for these materials, but given the myriad possible designs and applications, there is no optimal “one size fits all” material. Perhaps the most challenging HDI designs are those that use stacked vs. staggered microvias, with the number of layers of stacked microvias and the pitch between them as critical variables.

Thermoreflectance and Solving the Thermal Puzzle in 3D Packaging

06/11/2026 | Marcy LaRont, I-Connect007
Advanced packaging and 3D heterogeneous integration are rapidly redefining the next phase of the semiconductor industry, delivering unprecedented performance gains while posing significant thermal management challenges. In this interview, Dr. Mohammad (Mo) Shakouri, founder and CEO of Microsanj, discusses how thermoreflectance-based metrology is enabling engineers to visualize and measure heat behavior at the nanoscale within complex packages, interposers, and TSV structures.
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