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Has X-ray’s time finally come in electronics manufacturing? Join us in this issue of SMT007 Magazine, where we answer this question and others to bring more efficiency to your bottom line.
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It’s that time again. If you’re going to Anaheim for IPC APEX EXPO 2025, we’ll see you there. In the meantime, consider this issue of SMT007 Magazine to be your golden ticket to planning the show.
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Key industry organizations–all with knowledge sharing as a part of their mission–share their technical repositories in this issue of SMT007 Magazine. Where can you find information critical to your work? Odds are, right here.
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SMTA Releases IWLPC Program and Registration
July 16, 2019 | SMTAEstimated reading time: Less than a minute
The Surface Mount Technology Association (SMTA) has announced the program for the 16th annual International Wafer-Level Packaging Conference (IWLPC). The conference will be held October 22-24, 2019 at the DoubleTree by Hilton Hotel in San Jose, California.
The technical sessions on Tuesday and Wednesday are organized into three tracks: Wafer-Level Packaging, 3D Packaging, and Advanced Manufacturing and Test. The Wafer-Level Packaging (WLP) track features sessions on materials, reliability, metrology, processing, and new technology, such as Fan-Out WLP. The 3D Packaging track features sessions on design, test, characterization, wafer bonding, chip stacking, and processing for fan-out. The Advanced Manufacturing and Test track features sessions on process materials, equipment, inspection, and more.
Packaging technology experts John Lau, Ph.D., Unimicron Technology; John Hunt, ASE (US) Inc.; Gilad Sharon, Ph.D., ANSYS and Jeff Gotro, Ph.D., InnoCentrix, LLC, are scheduled to lead half-day workshops on Thursday, October 24, 2019.
Registration for IWLPC is now available online. Discounted rates are available for conference registration made on or before September 27, 2019. Visit www.iwlpc.com for more information.
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