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Current IssueThe Hole Truth: Via Integrity in an HDI World
From the drilled hole to registration across multiple sequential lamination cycles, to the quality of your copper plating, via reliability in an HDI world is becoming an ever-greater challenge. This month we look at “The Hole Truth,” from creating the “perfect” via to how you can assure via quality and reliability, the first time, every time.
In Pursuit of Perfection: Defect Reduction
For bare PCB board fabrication, defect reduction is a critical aspect of a company's bottom line profitability. In this issue, we examine how imaging, etching, and plating processes can provide information and insight into reducing defects and increasing yields.
Voices of the Industry
We take the pulse of the PCB industry by sharing insights from leading fabricators and suppliers in this month's issue. We've gathered their thoughts on the new U.S. administration, spending, the war in Ukraine, and their most pressing needs. It’s an eye-opening and enlightening look behind the curtain.
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NPL Webinar: Evaluation of Embedded Electronics for Use in Harsh Environments
September 26, 2019 | NPLEstimated reading time: 1 minute

NPL will hold a webinar on the evaluation of embedded electronics for use in harsh environments on October 1, 2019.
The ongoing trend of miniaturisation in the electronics industry has been focused on the reduction in size of components and component packaging. However, with an inevitable limit due to manufacturing capability, an alternative is required. Device embedded substrates are a promising solution which looks at miniaturisation from a substrate perspective, using a 3D approach to circuit design by placing components into the substrate as well as on the surface. This manufacturing method has been shown to increase circuit density, reduce signal paths, and reduce parasitic capacitances and inductances. Devices containing embedded components are already on the market but have yet to be evaluated fully for use in harsh environments
NPL’s work in this area, in collaboration with the University of Surrey, is looking at the reliability of embedded electronics to evaluate them for use within harsh environments through the creation of a test vehicle which was designed for testing of the reliability of the interconnect structures connecting the components. This is being achieved through the use of NPL’s harsh environment test facilities. The ongoing testing, for example thermal cycling from -55°C to +125°C, will indicate the structure’s suitability for use in harsh environments. Testing will also provide an insight into adaptations required in the standard testing parameters for industry.
To register, click here.
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