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SMT Stencils 101: Root-cause Stencil Design, Part 1—Solder Balls
Many times, the contract manufacturer does not have input into the board design, and when the board, stencil, and components arrive, PCB assembly is expected to be completed quickly and efficiently. First, articles are built, and, in some cases, challenges are present that must be addressed before completing the build or starting the production build. Two of the challenges we often hear about are 1) solder balls and 2) tombstoning, which I will cover in this two-part column series. I wanted to follow my last column on industry-standard stencil design with a discussion of specific stencil designs to solve these two issues.
When these challenges are present, the question then becomes, “Can a stencil design resolve these issues without the need for modifying and reordering the PCBs, which can be very costly?” Fortunately, the answer is yes. Some stencil designs can mitigate these yield challenges that have been developed and proven in our SMT lab complete with a printer, SPI, pick-and-place, reflow, and X-ray. This “root-cause stencil design” process typically begins by requesting specific reference designators where the issues are present, along with making sure we have the full Gerber package used to manufacture the PCB. Additionally, the component drawings for the specific components in question are requested and used to address the specific yield issue.
Solder Balls
The first challenge I will discuss involves solder balls, which are also referred to as mid-chip solder beads. The initial response when this challenge is addressed is to truly identify the issue as mid-chip beading and not solder splatter. By solder splatter, I’m talking about very small solder spheres that can be created during reflow as solder paste flux reacts with solder powder and the environment, creating a violent outgas event. These events can cause solder particles to “splatter” in the solder mask areas and are usually very small in size. They can be the result of the actual solder paste being used, the oven profile, and/or other contaminants present on the PCB before reflow or a combination of these. When we approach mid-chip beading from a stencil design viewpoint, we are specifically targeting larger solder balls that are present around the perimeter of the component (Figure 1).
When this occurs, the first step in the root-cause analysis process is to create the actual component outline and contacts in Gerber. The component design is then overlaid to the copper, mask, and current stencil layer to determine if the land pad on the PCB was designed for the specific part in question per IPC standards and/or the component manufacturer (Figure 2).
In many cases, when this process is used, the land pad on the PCB is larger than it should be and/or closer together than it should be, and excess solder paste is present either under the part or on the outside edges. Again, I discussed in my previous column, most stencil manufacturers will apply the homeplate, inverted homeplate, or U-shape homeplate when initially designing stencil apertures to prevent solder balls on passive components for no-clean solder paste assemblies. These designs typically remove paste volume from the inside center of the stencil apertures (Figure 3).
If one of these shapes has already been applied and solder balls still exist, a different design may be suggested along with an additional reduction in solder volume deposited. If these designs were not originally applied, one is suggested based on the type of component. The bottom line is solder balls are usually the result of excess volume, specifically under the inside center edge of the component. Specific volume reductions should be applied along with the proper design to reduce volume under the center inside edge of the component (Figure 4).
Lab results show the most success with the inverted Homeplate, and this is our most suggested design. However, other designs can also create similar results based on specific variables in the customer’s process. Another data point that must be considered is stencil thickness. One has to remember that 5-mil foil will deposit 25% more volume than 4-mil foil. Solder balls may exist on a 5-mil stencil and not on a 4-mil stencil with the same design. In some cases, total volume and aperture shape must be applied based on the specific foil thickness used.
Again, we are talking about addressing solder balls from a root-cause analysis standpoint. Typically, customers do not have solder ball challenges on a day-to-day basis. However, when they do occur, these considerations to eliminate solder balls in your process should be addressed.
Greg Smith is manager of stencil technology at BlueRing Stencils.
More Columns from SMT Stencils 101
SMT Stencils 101: Root-cause Stencil Design, Part 3—Tearing Down BridgesSMT Stencils 101: Root-cause Stencil Design, Part 2—Tombstones
SMT Stencils 101: What Are Industry-standard Stencil Designs?
Overcoming the Challenges of Miniaturization with New Stencil Technologies–Solder Paste Release, Pt. 2
Overcoming the Challenges of Miniaturization with New Stencil Technologies, Part 1: Solder Paste Release
A Brief History of Solder Stencil Manufacturing