-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueRules of Thumb
This month, we delve into rules of thumb—which ones work, which ones should be avoided. Rules of thumb are everywhere, but there may be hundreds of rules of thumb for PCB design. How do we separate the wheat from the chaff, so to speak?
Partial HDI
Our expert contributors provide a complete, detailed view of partial HDI this month. Most experienced PCB designers can start using this approach right away, but you need to know these tips, tricks and techniques first.
Silicon to Systems: From Soup to Nuts
This month, we asked our expert contributors to weigh in on silicon to systems—what it means to PCB designers and design engineers, EDA companies, and the rest of the PCB supply chain... from soup to nuts.
- Articles
- Columns
Search Console
- Links
- Media kit
||| MENU - design007 Magazine
Real Time with… Altium Live Europe 2020: Rick Hartley’s Secrets of PCB Optimization
October 29, 2020 | Pete Starkey, I-Connect007Estimated reading time: 4 minutes
As Lawrence Romine said in his introduction, “There’s that moment when you sit in the crowd and hear Mr. Rick Hartley speak that you know you’ve arrived in PCB design.” With 50 years in the industry focused on circuit and PCB design—and as a specialist in EMI, noise, and signal integrity issues—Rick Hartley was invited to talk about PCB optimisation. But meaning what? There were a lot of things that could be optimised on a PCB.
In this particular case, Hartley was going to talk about designing boards to optimise manufacturability, with particular regard to cost-effective fabrication. I was eager to hear what he had to say, particularly having been for many years a fabricator myself, with much of my time spent talking to designers. The ones I liked best asked all the what-if questions before they began a new design. The ones who caused the most annoyance belonged to the “over-the-wall” category. It gave me enormous satisfaction to arrange for them to visit our factory then surprise them with an invitation to help manufacture what they had designed. They would say, “I never knew it was that complicated.”
Hartley made it clear that although he could easily make a really long presentation on the subject—eight hours at least—he would cover as much as he could in his conference time slot. His overarching message, which he repeated many times, was “Talk to the fabricator,” commenting, “Fabricators know their processes and know them well. If we ship them designs that make sense, that are well-thought-out, they won’t have scrap. When they have high levels of scrap, it’s because we as designers have not done our job right.” The question to ponder was, “When there’s scrap at a fab house, who do you think pays?”
He discussed some of the key items of information that a fabricator would check once a design was received for manufacture, the first of which was board size in the context of economic material utilisation. Next came the material choice, number of layers, and layers per given board thickness. There was still a common presumption that all circuit boards must be one-sixteenth of an inch (62 mils) thick, like the early single and double-sided designs and the card-guides they fitted into. He urged designers to think carefully about the consequences when nominating board thickness, commenting on the difficulty in manufacturing a 16-layer controlled impedance design to a finished thickness of 62 mils.
He recalled an early experience of working with a fabricator to optimise the finished thickness of a series of 12-layer designs, taking into account the issues of performance, ease-of-manufacture, and cost-effectiveness, arriving at a figure of 75 ±5 mils. Drilling cost obviously increased with the number of holes, but probably more significant factors were minimum hole size and aspect ratio, pad-to-hole size ratio, and power and ground plane clearance from the hole wall. IPC standards were a useful reference for clearances and tolerances.
Continuing down his list of critical parameters, he discussed minimum conductor widths and spaces, particularly in relation to copper foil thickness and copper balance layer-to-layer. Explaining at each stage the reasons for preferred and non-preferred options, he covered the topics of solder masks and component legends, final finishes, and metallisations, as well as edge connectors, controlled impedance, and design-specific features.
For guidance on actual fabrication cost, he referred to the “fabrication report card” described by Happy Holden, where each line-item was associated with a weighting factor, and low numbers were to be preferred when establishing cost per panel. Mention of cost per panel led to a discussion on preferred panel sizes and material utilisation, reminding designers that the panel also had to accommodate test coupons, tooling holes and copper-thieving in the perimeter, and room for profile-machining between individual circuits.
Again, the advice was, “Talk to the fabricators and make sure your design fits their panels and their processes.” Not forgetting the assembler, Hartley reminded designers to be aware of the keep-out areas necessary for supporting and transporting the board through the assembly process and not to fill them with components. Alternatively, put multiple small boards into a sub-panel. “Talk to the assembler as well.”Page 1 of 2
Suggested Items
Indium Technical Expert to Present at SiP Conference China
11/25/2024 | Indium CorporationIndium Corporation Senior Area Technical Manager for East China Leo Hu is scheduled to deliver a presentation on Low-Temperature Solder Material in Semiconductor Packaging Applications at SiP China Conference 2024 on November 27 in Suzhou, China.
Indium Corporation to Showcase Precision Gold Solder Solutions at MEDevice Silicon Valley 2024
11/18/2024 | Indium CorporationIndium Corporation® will feature its high-reliability AuLTRA® MediPro gold solder solutions at MEDevice Silicon Valley, taking place on November 20-21 in Silicon Valley, California. AuLTRA® MediPro is a family of high-performance, precision gold solder solutions for critical medical applications.
AIM to Highlight NC259FPA Ultrafine No Clean Solder Paste at SMTA Silicon Valley Expo & Tech Forum
11/14/2024 | AIMAIM Solder, a leading global manufacturer of solder assembly materials for the electronics industry, is pleased to announce its participation in the upcoming SMTA Silicon Valley Expo & Tech Forum taking place on December 5 at the Fremont Marriott Silicon Valley in Fremont, California.
Data-driven Precision in PCBA Manufacturing
11/13/2024 | Julie Cliche-Dubois, CogiscanThe intricacies involved in electronics manufacturing require more than just expensive equipment and skilled technicians; they necessitate an accurate understanding of the entire production flow, informed and driven by access and visibility to reliable data.
Rehm Thermal Systems Mexico Wins the Mexico Technology Award 2024 in the Category Convection Soldering
11/13/2024 | Rehm Thermal SystemsRehm Thermal Systems Mexico has won the Mexico Technology Award in the category convection soldering with the patented mechatronic curtain for convection soldering systems.