-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueDesigning Through the Noise
Our experts discuss the constantly evolving world of RF design, including the many tradeoffs, material considerations, and design tips and techniques that designers and design engineers need to know to succeed in this high-frequency realm.
Learning to Speak ‘Fab’
Our expert contributors clear up many of the miscommunication problems between PCB designers and their fab and assembly stakeholders. As you will see, a little extra planning early in the design cycle can go a long way toward maintaining open lines of communication with the fab and assembly folks.
Training New Designers
Where will we find the next generation of PCB designers and design engineers? Once we locate them, how will we train and educate them? What will PCB designers of the future need to master to deal with tomorrow’s technology?
- Articles
- Columns
Search Console
- Links
- Media kit
||| MENU - design007 Magazine
Why We Simulate
April 29, 2021 | Bill Hargin, Z-zeroEstimated reading time: 1 minute

When I was cutting my teeth in high-speed PCB design some 25 years ago, speeds were slow, layer counts were low, dielectric constants and loss tangents were high, design margins were wide, copper roughness didn’t matter, and glass-weave styles didn’t matter. We called dielectrics “FR-4” and their properties didn’t matter much. A fast PCI bus operated at just 66 MHz.
As speeds increased in the 1990s and beyond, PCB fabricators acquired software tools for designing stackups and dialing in target impedances. In the process, they would acquire PCB laminate libraries, providing proposed stackups to their OEM customers late in the design process, including material thicknesses, copper thickness, dielectric constant, and trace widths—all weeks or months after initial signal-integrity simulation and analysis should have taken place.
Speeds continued to increase in the 2000s; design margins continued to tighten, and OEM engineers began tracking signals in millivolts (mV) and picoseconds (ps). Figure 1 illustrates these trends starting in 2000, emphasizing the trajectory of PCI Express trajectory, from PCIe 3.0 in 2010 to PCIe 6.0, which is just on the doorstep.
In webinars and training events I often pose this question: “Why do we simulate?” I ask because the answers tell me a lot about the audience, and some wise older person long ago told me and my fellow students to “always know your audience.”
When I ask that, I get answers like faster signaling speeds, calculating impedance or loss, opening eyes and avoiding inter-symbol interference, controlling crosstalk, etc. These are all good answers, but a bit on the periphery in my view.
One astute signal integrity practitioner offered that we simulate for only two reasons:
- To make design decisions (i.e., evaluate tradeoffs during design).
- To verify a design before manufacturing (verification).
The only question that designers really care about is, “Will it work and by how much?” This implies that the simulation should be able to produce tangible metrics that can be related to design success or failure. Fair enough.
This is a good description for “why we simulate,” but so far, I’ve never heard anyone mention the most fundamental reason, in my opinion, for signal integrity (SI) or power integrity (PI) simulation: To predict the negative impact that the physical world has on the electrical world, and to mitigate or prevent the negative effects proactively.
To read this entire article, which appeared in the April 2021 issue of Design007 Magazine, click here.
Suggested Items
Elephantech: For a Greener Tomorrow
04/16/2025 | Marcy LaRont, PCB007 MagazineNobuhiko Okamoto is the global sales and marketing manager for Elephantech Inc., a Japanese startup with a vision to make electronics more sustainable. The company is developing a metal inkjet technology that can print directly on the substrate and then give it a copper thickness by plating. In this interview, he discusses this novel technology's environmental advantages, as well as its potential benefits for the PCB manufacturing and semiconductor packaging segments.
Trouble in Your Tank: Organic Addition Agents in Electrolytic Copper Plating
04/15/2025 | Michael Carano -- Column: Trouble in Your TankThere are numerous factors at play in the science of electroplating or, as most often called, electrolytic plating. One critical element is the use of organic addition agents and their role in copper plating. The function and use of these chemical compounds will be explored in more detail.
IDTechEx Highlights Recyclable Materials for PCBs
04/10/2025 | IDTechExConventional printed circuit board (PCB) manufacturing is wasteful, harmful to the environment and energy intensive. This can be mitigated by the implementation of new recyclable materials and technologies, which have the potential to revolutionize electronics manufacturing.
Connect the Dots: Stop Killing Your Yield—The Hidden Cost of Design Oversights
04/03/2025 | Matt Stevenson -- Column: Connect the DotsI’ve been in this industry long enough to recognize red flags in PCB designs. When designers send over PCBs that look great on the computer screen but have hidden flaws, it can lead to manufacturing problems. I have seen this happen too often: manufacturing delays, yield losses, and designers asking, “Why didn’t anyone tell me sooner?” Here’s the thing: Minor design improvements can greatly impact manufacturing yield, and design oversights can lead to expensive bottlenecks. Here’s how to find the hidden flaws in a design and avoid disaster.
Real Time with... IPC APEX EXPO 2025: Tariffs and Supply Chains in U.S. Electronics Manufacturing
04/01/2025 | Real Time with...IPC APEX EXPOChris Mitchell, VP of Global Government Relations for IPC, discusses IPC's concerns about tariffs on copper and their impact on U.S. electronics manufacturing. He emphasizes the complexity of supply chains and the need for policymakers to understand their effects.