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Beyond the Rulebook
What happens when the rule book is no longer useful, or worse, was never written in the first place? In today’s fast-moving electronics landscape, we’re increasingly asked to design and build what has no precedent, no proven path, and no tidy checklist to follow. This is where “Design for Invention” begins.
March Madness
From the growing role of AI in design tools to the challenge of managing cumulative tolerances, these articles in this issue examine the technical details, design choices, and manufacturing considerations that determine whether a board works as intended.
Looking Forward to APEX EXPO 2026
I-Connect007 Magazine previews APEX EXPO 2026, covering everything from the show floor to the technical conference. For PCB designers, we move past the dreaded auto-router and spotlight AI design tools that actually matter.
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Cadence’s Dr. Anirudh Devgan to be Honored with 2021 Phil Kaufman Award on May 12
March 28, 2022 | Cadence Design Systems, Inc.Estimated reading time: Less than a minute
Dr. Anirudh Devgan, President and CEO of Cadence Design Systems, will be honored with the 2021 Phil Kaufman Award for Distinguished Contributions to Electronic System Design at an award ceremony and banquet Thursday, May 12.
Hosted by the Electronic System Design Alliance (ESD Alliance) and the IEEE Council on Electronic Design Automation (CEDA), the celebration will be held from 6:30 p.m. until 9:30 p.m. at The GlassHouse, 2 South Market Street in San Jose, Calif.
Early bird pricing for tickets is available through Friday, April 8, at $175 per individual from member companies and $225 each for non-members. Member tickets after April 8 are $225 each and $275 per non-member. Member pricing is offered for individuals in companies that are active SEMI members or active IEEE members.
Download The System Designer’s Guide to… System Analysis by Brad Griffin. You can also view other titles in our full I-007e Book library here.
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FlashPCB Welcomes Adam Broeckert, EIT as Manufacturing Engineer
04/20/2026 | FlashPCBFlashPCB, a leading provider of quick-turn PCB assembly, is pleased to announce the addition of Adam Broeckert, EIT, as Manufacturing Engineer.
Single Pair Ethernet (SPE): A Valuable Option for Modern Designs
04/20/2026 | Marcy LaRont, I-Connect007When it comes to designing PCBs and full systems for increasingly complex electronics hardware, who doesn’t want to reduce complexity and cost? Single-Pair Ethernet (SPE) has emerged as a solution and is gaining rapid attention across industrial electronics and PCB design because it enables Ethernet communication over a single twisted pair, replacing the traditional two- or four-pair cabling used in standard Ethernet networks. This seemingly simple shift has significant implications for designers: smaller connectors, reduced cable weight, longer reach, and the ability to carry both data and power over a single pair.
DARPA Launches HARQ Program to Integrate Diverse Qubits for Scalable Quantum Computing
04/20/2026 | DARPADARPA has launched the Heterogeneous Architectures for Quantum (HARQ) program, an effort aimed at overcoming one of the most persistent barriers in quantum computing: how to move beyond single-technology systems to achieve and scale practical, high-impact applications.
Spirit Electronics Named Authorized Distributor for Microchip Technology
04/17/2026 | Globe NewswireSpirit Electronics, a vertically integrated electronics design and manufacturing solutions provider serving the military and aerospace markets, announced that it has been designated as an authorized distributor for the Americas for Microchip Technology, a broadline supplier of semiconductors committed to making innovative design easier through total system solutions.
Cadence, NVIDIA Expand AI & Accelerated Computing Partnership
04/17/2026 | Cadence Design Systems, Inc.At CadenceLIVE Silicon Valley 2026, Cadence announced an expanded partnership with NVIDIA to deliver accelerated solutions across agentic AI, physics-based simulation and digital twins to unlock new levels of productivity and accelerate next‑generation engineering design flows across semiconductor design, physical AI systems and hyperscale AI factories.