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Siemens Introduces Questa Verification IP Solution Support for CXL 3.0 Protocol
August 30, 2022 | Siemens Digital Industries SoftwareEstimated reading time: 1 minute
Siemens Digital Industries Software announced that its simulator-independent Questa™ Verification IP solution now supports the new Compute Express Link (CXL) 3.0 protocol for high-performance computing (HPC) applications. CXL 3.0 is based on the Peripheral Component Interconnect Express (PCIe) networking protocol, which facilitates the rapid transfer of data between the world’s highest performance cloud computing servers as well as billions of smart connected devices around the world.
Available immediately, Siemens’ Questa Verification IP solution for CXL 3.0 integrates seamlessly into all advanced verification environments on any simulator. For customers looking to incorporate the new CXL 3.0 protocol into their next-generation designs, the solution helps customers optimize productivity and flexibility for the verification of block-level, subsystem, and system-on-a-chip (SoC) designs, which can speed time-to-market.
“By offering early support for the new CXL 3.0 protocol, Siemens can help customers differentiate and win in highly competitive HPC markets around the world,” said Mark Olen, product management director, IC Verification Solutions, Siemens Digital Industries Software. “Available now for early adopters of the CXL 3.0 protocol, our new Questa Verification IP solution provides a proven, robust and comprehensive verification platform that allows our customers to validate their next-generation designs with speed and confidence.”
Engineered to expedite verification closure and expose complex design issues, Siemens’ Questa™ Verification IP solution supports detailed functional verification across all layers of the CXL 3.0 specification. This latest offering from Siemens includes ready-to-use verification components and exhaustive stimuli that can help increase productivity and accelerate verification signoff. In addition, the solution can eliminate design biases found in many competing solutions.
Suggested Items
DownStream Acquisition Fits Siemens’ ‘Left-Shift’ Model
06/26/2025 | Andy Shaughnessy, I-Connect007I recently spoke to DownStream Technologies founder Joe Clark about the company’s acquisition by Siemens. We were later joined by A.J. Incorvaia, Siemens’ senior VP of electronic board systems. Joe discussed how he, Rick Almeida, and Ken Tepper launched the company in the months after 9/11 and how the acquisition came about. A.J. provides some background on the acquisition and explains why the companies’ tools are complementary.
Elementary Mr. Watson: Retro Routers vs. Modern Boards—The Silent Struggle on Your Screen
06/26/2025 | John Watson -- Column: Elementary, Mr. WatsonThere's a story about a young woman preparing a holiday ham. Before putting it in the pan, she cuts off the ends. When asked why, she shrugs and says, "That's how my mom always did it." She asks her mother, who gives the same answer. Eventually, the question reaches Grandma, who laughs and says, "Oh, I only cut the ends off because my pan was too small." This story is a powerful analogy for how many PCB designers approach routing today.
Siemens Turbocharges Semiconductor and PCB Design Portfolio with Generative and Agentic AI
06/24/2025 | SiemensAt the 2025 Design Automation Conference, Siemens Digital Industries Software today unveiled its AI-enhanced toolset for the EDA design flow.
Cadence AI Autorouter May Transform the Landscape
06/19/2025 | Andy Shaughnessy, Design007 MagazinePatrick Davis, product management director with Cadence Design Systems, discusses advancements in autorouting technology, including AI. He emphasizes a holistic approach that enhances placement and power distribution before routing. He points out that younger engineers seem more likely to embrace autorouting, while the veteran designers are still wary of giving up too much control. Will AI help autorouters finally gain industry-wide acceptance?
Beyond Design: The Metamorphosis of the PCB Router
06/18/2025 | Barry Olney -- Column: Beyond DesignThe traditional PCB design process is often time-consuming and labor-intensive. Routing a complex PCB layout can consume up to 30% of a designer’s time, and addressing this issue is not straightforward. We have all encountered this scenario: You spend hours setting the constraints and finally hit the Go button, only to be surprised by the lack of visual appeal and the obvious flaws in the result.