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Elementary Mr. Watson: Navigating RF—A Glide Path Approach to Design Success
Designers Notebook: Layer Stackup Planning for RF Circuit Boards
DFM 101: Cost Driver Summary
June 8, 2023 | Anaya Vardya, American Standard CircuitsEstimated reading time: 1 minute
Introduction
One of the biggest challenges facing PCB designers is in not understanding the cost drivers in the PCB manufacturing process. We will wrap up this DFM series with a summary of cost drivers that impact delivery, quality, and reliability. It is categorized by low-, medium-, and high-cost adders.
Low-cost Adders (< 10% board cost)
Complex routing and scoring mean a small increase in process time, but a process is still required which will be driven by NC programming; it may limit tool life as a function of diameter. Thicker or thinner PWBs (>0.093", <0.030") means a material cost variation but it is minimal. Via plug or button print requires a small process change to the screen-print mask dot.
Medium-cost Adders (10–25%)
Regarding drilled hole quantity, there is a cost adder for high-density design-driven hole count and process time. With smaller drilled hole size, the small drill diameter (<0.010") limits throughput and stack height.
Embedded resistors with Ohmega/Gould technology will need additional core testing and finished board verification. Non-FR-4 materials, like PTFEs, can be 10 to 20 times the FR-4 cost, and material cost is generally 25–50% of the board cost. Edge plating will have additional processes required prior to plating.
To read this entire article, which appeared in the May 2023 issue of Design007 Magazine, click here.
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