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The Pulse: New Designer’s (Partial) Guide to Fabrication

PCB designers fresh to the industry may think that once the schematic is loaded into CAD and routed out into XY data, the finished PCB is an “exact” copy of their XY data. That’s not an unreasonable assumption for basic designs. Here, I’ll outline some of a designer’s considerations related to signal integrity as designs become more complex.

A False Assumption?
It may appear to the casual observer that PCB fabrication is “just” like PCB assembly. Even in casual language, when industry outsiders discuss making printed circuit boards, nine times out of 10, they imagine the assembly process rather than the PCB fabrication process. It's then a casual segue to consider that just as components are attached to a PCB with solder—but apart from that are unchanged from their raw form—the PCB itself is just that: a bonding of components unchanged by the manufacturing process. I’ve met many PCB designers and some EEs who slip into this assumption, especially that they can create a stackup “exactly” from the base material datasheet.

It's not a bad assumption on low layer count and simple low-speed boards, but as layer count and stack complexity increase in a design, it becomes increasingly necessary to know which layers are core or prepreg, which ones will press, and which layers the copper traces will press into. Experienced designers know that dimensions across core materials are quite predictable and the datasheet information is good to rely on. But suddenly, “it depends” when a foil is laminated onto prepreg, or two cores are laminated with prepreg with the Z-axis dimensions.

Datasheets and Interpretations
When you look at a stack schematic as in Figure 1, the labels showing core, prepreg, and the foils are separate from the prepreg materials. But to the uninitiated, it is not so clear what is pressing into what and which dimensions are fixed.

The schematic view of a stackup is a very clear illustration of the content of the stack, but it is not to scale, and more importantly, it does not show graphically where the traces impress into the prepreg, nor visually show the plated thickness on drilled or double-plated thickness on sequentially laminated traces where needed.

Figure 2 shows the schematic overview of the stack alongside a proportionally scaled view so you can see just how much the pressed stack varies from the schematic stack.

I have intentionally overlaid the proportional stack on the right of the schematic stack to show how the copper presses into the prepregs in contrast to the copper on the core side where its Z-dimension across the core is fixed. This illustration shows that new designers often wish to get accurate data from the material datasheet. The fact that PCBs are laid-up cores, followed by prepregs, cores, prepregs, and then foils means that the isolation distance between the copper on a core and the next core will depend on the amount the copper traces impress into the prepreg that flows during the heat and pressure of the press cycle. Stackup tools can make a good prediction of this, given the copper density of the tracking layers, but there will always be a degree of variation from fabricator to fabricator, depending on their press equipment and settings. This doesn’t make the information on isolation distance invalid, it’s just that the designer needs more than a datasheet to make the height prediction. As always, if the designer has a good relationship with the fabricator (or a specialist broker), then good predictions and models can be made. Longer supply chains, though, can make this a challenge.

The isolation distance marked in Figure 3 shows the Z distance from the surface of a trace facing downwards from a core. It is pressed into the top of the three prepreg layers below. The stackup tool, in this case, is fed with the copper coverage percentage on each layer to assist in predicting how far the copper presses into the prepreg.

A good sanity check with this kind of calculation is to think of the limit situation. With 100% copper coverage (such as a ground plane), there will be no penetration into the prepreg. The same is true for the other limit situation: With zero percent copper coverage, again there is no penetration into the prepreg. The maximum situation is at 50% copper coverage where the resin in the prepreg will flow into all the gaps between the traces.

I’ve written this from the perspective of PCB thickness and isolation distances, but there are many other areas where it is very valuable for PCB designers to have an insight into the PCB fabrication process. A visit to a PCB fabricator is an enlightening and educational experience. From time to time, industry bodies like EIPC arrange such plant tours, and one such tour is taking place in southern Germany later this month. Visit eipc.org for more information. If you miss this one, be sure to keep your eyes open for another one or call your local PCB supplier and ask for a visit.

Conclusion
PCB fabrication is quite different from PCB assembly. In assembly, the parts are joined electrically and mechanically by soldering, but the components (including the PCB) travel through the process essentially unchanged. In PCB fabrication, copper is etched and plated, sometimes multiple times in sequential-lamination boards, and the prepregs change state as the resin heats and flows to a degree in the curing process. For that reason, a designer needs more than a raw material datasheet to understand how the PCB being fabricated will change in the process.

Martyn is the author of The Printed Circuit Designer’s Guide to… Secrets of High-Speed PCBs, Parts 1 and 2.

This column originally appeared in the January 2024 issue of Design007 Magazine.