-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueCreating a Culture of Collaboration
PCB designers could learn quite a bit from NASA and the private companies that develop spacecraft: Every one of these vehicles is a testament to the value of collaboration among disparate stakeholders. Without a collaborative culture, the rocket might never get off the ground.
Breaking High-speed Material Constraints
Do you need specialty materials for your high-speed designs? Maybe not. Improvements in resins mean designers of high-speed boards can sometimes use traditional laminate systems. Learn more in this issue.
Level Up Your Design Skills
This month, our contributors discuss the PCB design classes available at IPC APEX EXPO 2024. As they explain, these courses cover everything from the basics of design through avoiding over-constraining high-speed boards, and so much more!
- Articles
- Columns
Search Console
- Links
- Events
||| MENU - design007 Magazine
Samsung Reportedly Achieves Technical Breakthrough, Stacking 3D DRAM to 16 Layers
June 5, 2024 | PRNewswireEstimated reading time: 1 minute
![](https://iconnect007.com/application/files/1817/1758/8694/Samsung.jpg)
According to the news report from DIGITIMES Asia, Samsung Electronics has successfully stacked the next-gen 3D DRAM to 16 layers, twice as many as its competitor Micron.
According to reports from TheElec and ZDNet Korea, citing industry sources, Samsung has successfully stacked 3D DRAM into 16 layers. In contrast, Micron has only achieved 8 layers. However, the 3D DRAM product is currently in the feasibility stage; the goal is to realize commercialization by 2030.
The 3D DRAM uses vertical stacking, which can increase the capacity per unit area by three times, thus enabling the rapid processing of large amounts of data. Samsung aims to widen the gap with competitors in 3D DRAM technology. Compared to existing DRAM structures, 3D DRAM can include more storage cells and reduce electrical interference.
Unlike traditional DRAM, the VS-CAT style 3D DRAM is expected to be manufactured by combining two wafers, a concept similar to YMTC's Xtacking. 3D DRAM stacking is also expected to utilize Wafer-to-Wafer (W2W) hybrid bonding, a technology already utilized in NAND and CMOS Image Sensors (CIS).
At the same time, Samsung is also researching vertical channel transistor (VCT) style 3D DRAM. The industry also refers to VCT-style 3D DRAM as 4F SQUARE, with its most notable characteristic being its vertically oriented transistor structure. If Samsung successfully develops this, the die area could shrink to around 30% of the original size.
Industry sources indicated that Samsung will unveil 4F SQUARE prototypes in 2025. In contrast, Samsung's two major competitors in the DRAM market, SK Hynix and Micron have elected to develop 3D technology with a stacked cell style.
In addition, Samsung mentioned the possibility of applying Backside Power Delivery Network (BSPDN) technology to DRAM for the first time. BSPDN is considered a highly difficult technology, and Samsung plans to introduce BSPDN technology into the 2nm process by 2025.
Suggested Items
CSPs to Expand into Edge AI, Driving Average NB DRAM Capacity Growth by at Least 7% in 2025
06/26/2024 | TrendForceTrendForce has observed that in 2024, major CSPs such as Microsoft, Google, Meta, and AWS will continue to be the primary buyers of high-end AI servers, which are crucial for LLM and AI modeling.
Global Semiconductor Fab Capacity Projected to Expand 6% in 2024 and 7% in 2025
06/18/2024 | SEMITo keep pace with unremitting growth in demand for chips, the global semiconductor manufacturing industry is expected to increase capacity by 6% in 2024 and post a 7% gain in 2025, reaching a record capacity high of 33.7 million wafers per month (wpm: 8-inch equivalent), SEMI announced today in its latest quarterly World Fab Forecast report.
Contract Price Increases Offset Seasonal Slump, Boosting DRAM Q1 Revenue by 5.1%
06/13/2024 | TrendForceTrendForce reveals that the DRAM industry experienced a 5.1% revenue increase in 1Q24 compared to the previous quarter. This growth—reaching US$18.35 billion—was driven by rising contract prices for mainstream products, with the price increase being more significant than in 4Q23. As a result, most companies in the industry continued to see revenue growth.
HBM3e Production Surge Expected to Make Up 35% of Advanced Process Wafer Input by End of 2024
05/20/2024 | TrendForceTrendForce reports that the three largest DRAM suppliers are increasing wafer input for advanced processes. Following a rise in memory contract prices, companies have boosted their capital investments, with capacity expansion focusing on the second half of this year.
DRAM Contract Prices for Q2 Adjusted to a 13–18% Increase
05/07/2024 | TrendForceTrendForce’s latest forecasts reveal contract prices for DRAM in the second quarter are expected to increase by 13–18%, while NAND Flash contract prices have been adjusted to a 15–20% Only eMMC/UFS will be seeing a smaller price increase of about 10%.