My Drop Shock Testing Experiments to Determine Reliability in PCBs

Estimated reading time: 3 minutes

Tablets, digital cameras, and smartphones are portable electronics that have become increasingly popular. Compact design and improved functionality are common product and package design trends. However, because they are portable, these devices may fall and cause internal damage. In addition, customers may use products in different environments, exposing them to risks that could cause harm. For example, a smart device such as a phone or tablet could be dropped while being used, or a warehouse shipment could be handled carelessly and fall. Products must have sufficient mechanical shock reliability to reduce the likelihood of damage.

A solder joint in a printed circuit board links the component and the board, ensuring electronic devices function properly. Dropping an electronic device can cause impact fatigue in solder materials, which could lead to joint failures. Even if the solder joint survives the impact, other failures, such as pad cratering and copper trace cracks can occur. While dropping a device once may not cause any failures, repeated drops can cause cumulative damage and eventually rupture solder joints or other assembly materials. That’s why drop shock testing is a useful experimental technique for designing PCBs for reliability.

Lead-free soldering has become standard practice since the RoHS (Restriction of Hazardous Substances) Directive was implemented in 2006. Solder compositions have, therefore, changed substantially, moving away from the conventional tin-lead (SnPb) to lead-free. Sn-Ag-Cu alloys are the most popular lead-free substitute in the industry. Lead-free solders may also include dopant elements such as bismuth (Bi), antimony (Sb), and nickel (Ni) to enhance the solder’s properties. Board-level drop testing has become increasingly important because of the switch from ductile lead-based alloys to brittle lead-free solder alloys.

Concerns about switching to lead-free doped solders are getting more attention. How lead-free doped interconnects would respond in drop shock tests is mainly unknown. Many of these solders' dynamic properties are still being studied, with only a few drop tests being conducted that compare the drop resistance between lead-free doped and leaded solders. As a result, there's a growing need to develop new PCB design guidelines tailored to lead-free, drop-resistant packages. This reflects a change in the electronics packaging industry.

Solder joints often experience temperature fluctuations, drops, and vibrations in real-world service conditions, leading to thermal and mechanical stresses. Electronic packages undergo warpage and distortion during temperature changes in manufacturing and operation, primarily because of shear deformation from CTE mismatch. In addition, solder joints may encounter mechanical and environmental stresses such as drops and vibrations during service, which typically impose shear and tensile loads.

While most studies focus on drop shock reliability at room temperature, few have examined the performance of solder joints under elevated temperatures. There is a pressing need for systematic research on how simultaneous thermal and mechanical loads affect the drop shock performance of SAC-based alloys in BGA assemblies.

In my research, I have tested various third-generation lead-free solder alloys and compared them with the traditional SnPb and SAC305 for drop shock reliability. My studies have shown that an elevated temperature environment can significantly reduce the drop life of solder joints. I have conducted drop tests at various acceleration levels for each alloy and different temperatures (ranging from 25 °C-100 °C) and surface finishes. The test vehicle was a PCB comprised of an FR-4 substrate with a CABGA208 component at its center. The boards were designed to make the solder joint the weakest link and prevent failures, such as pad cratering, which is essential to determine the solder joint reliability.

To create an elevated temperature environment, I designed a heating chamber fixed to the top of the drop table housing flexible heaters. I chose flexible heaters so the design could take the drop impacts without failing. The component was designed to be daisy-chained with four separate chains for the corner joints and a fifth for the remaining joints. During the drop test, I first collected the resistance data for the corner joints, as they are usually the first to fail.

After completing tests, I performed Weibull analysis to determine the characteristic life and shape parameters for each condition. To quantify the contribution of each experimental factor to the solder interconnect's life, I performed an ANOVA. Predictive modeling was also performed using an energy-based model with input energy as the damage parameter for different G-levels and the Arrhenius model for varying temperatures. I also conducted an  experiment to determine the correlation between solder hardness and drop life. In addition, microstructure analysis was performed using optical microscopy, SEM, and EDX techniques to determine the failure modes and trends with increasing operating temperatures and acceleration levels.

Palash Vyas is a recent doctoral graduate from Auburn University.