Designers Notebook: Layer Stackup Planning for RF Circuit Boards
Connect the Dots: Involving Manufacturers Earlier Prevents Downstream Issues
Global PCB Connections: The Next Wave of HDI PCBs– How Design Engineers Can Stay Ahead
Hidden Cost Drivers in PCB Design
September 5, 2024 | Cherie Litson, CID+, Litson1 ConsultingEstimated reading time: 1 minute
I recently taught a CID+ course, and if you’ve ever taken a CID or CID+ course, you know that we discuss cost adders quite a bit. When I asked the class of 15 design engineers their ideas on the biggest cost adders, the first and strongest response: the project manager.
Are you surprised by their answer? After over 40 years in the industry, I wasn’t. If you step back and look at the process of product development, you’ll see that many decisions that affect costs down the line really do take root with the project manager.
After reviewing my own experience and that of many other designers, I referenced my favorite source for defining cost adders: the IPC PCBA Checklist 17. Here you’ll find most of the cost adders that we all encounter to one degree or another. As you review the checklist and see who is responsible for many of the decisions, you’ll find it all starts with the project leader.
Everything you’ve read about the cost-saving process is controlled by the project leader’s actions; the project leader is like the chef in the kitchen.
The engineers and designers will then limit their decisions based on the requirements set by the project leader. They become the “sous chef” in the process. The engineers and designers then set the limits and specifications in their documentation affecting purchasing, fabrication, assembly, and test. They become the “station chef” or “line chef.” That’s why the CID and CID+ classes focus so much on the design engineer’s decisions. But no one really addresses or guides the project leaders for their role in the cost saving process.
To read this entire article, which appeared in the August 2024 issue of Design007 Magazine, click here.
Share on:
Suggested Items
Smart and Compact Sensors with Edge-AI
04/16/2025 | FraunhoferA newly launched interdisciplinary research project involving universities of Brandenburg and research institutions is developing new technological approaches for better and more effective integration of artificial intelligence at the edges of IT networks, so-called “edges”.
New TSN-MACsec IP Core for Secure Data Transmission in 5G/6G Communication Networks
04/15/2025 | FraunhoferReliability and security in broadband communication networks (5G/6G) are crucial for meeting the challenges of the digital future. Together with aconnic AG, Fraunhofer IPMS has developed an innovative IP core as part of the “RealSec5G” project, which combines the advantages of a MACsec IP core with those of a Time-Sensitive Networking (TSN) IP core.
New Splitting Method: Fraunhofer IIS Brings Satellites Into The 5G Era
04/04/2025 | Fraunhofer IAFGlobal mobile communications that reliably reach every remote region, leaving no gaps on the map? Satellites play a key role in achieving this goal. In the future, however, not all satellites will be powerful enough to act as complete base stations.
Airbus Foundation Joins Forces with the Solar Impulse Foundation to Boost Climate Action
03/28/2025 | AirbusThe Airbus Foundation and Solar Impulse Foundation have launched a three-year partnership aimed at driving global progress on sustainability through fostering innovation and collaboration.
Global Fab Equipment Investment Expected to Reach $110 Billion in 2025
03/26/2025 | SEMIGlobal fab equipment spending for front-end facilities in 2025 is anticipated to increase by 2% year-over-year (YoY) to $110 billion, marking the sixth consecutive year of growth since 2020, SEMI announced today in its latest quarterly World Fab Forecast report.