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Flexible Thinking: Musings on High Density Interconnections

People have been using high density interconnection (HDI) technology since the early 1980s, although it was not called HDI until the late 1990s. In the 1970s, ’80s, and early ’90s, engineers used HDI methods to develop hybrid circuits, which were later referred to as multichip modules (MCMs). These were arguably the first instantiation of heterogeneous interconnection technology, which has been the industry buzzword for almost a decade. These devices are a way of integrating multiple chips—both integrated circuits and discrete devices (resistors, capacitors, and inductors)—into a single package, typically using ceramic substrates with layers of insulation and metallic inks (often gold) and firing them at high temperatures.

The intent was to enhance the performance and reduce the size of electronic systems—a theme that has been a constant in the electronics manufacturing world since day one. If it hasn’t dawned on you yet, there are echoes of those early efforts in what are now called “chiplets” in the “new” heterogeneous era. I wrote an article about LEGO-like packages almost 30 years ago. Around 2013, I suggested that chip scale packages could be used to package IP blocks, which would allow a designer to create an integrated circuit with the least number of transistors necessary. I also wrote more recently that my first “integrated circuit” consisted of six transistors soldered to and functionally integrated by a printed circuit in 1957, a year before Jack Kilby invented the IC.

High-performance computing and military applications primarily utilized ceramic multichip modules (MCM-Cs) in situations where space and performance were critical. Ceramic was brittle but also highly resistant to heat and moisture. Following the lead of military product developers, the commercial world adopted the idea of the MCM but used organic laminates and PCB fabrication technologies to create the products (MCM-Ls). Chips were typically attached using metal-filled epoxies, and wire bonding technology was used to make interconnections between chips. Both technologies used solder to attach discrete devices, but ceramic allowed the designer to form resistors and planar capacitors on the device during fabrication—a technique that was ultimately replicated for the organic laminate users.

The technology behind MCMs matured in the early 1990s and advancements in semiconductor fabrication and packaging technologies allowed for the design and manufacture of ever more complex MCM designs. Microprocessor makers such as Intel began exploring MCMs for their potential to combine multiple processors or memory chips into a single module to improve performance and efficiency. It was also a period when flip-chip interconnection methods took off. They originally used solder bumps and many still do, but hybrid diffusion/copper-copper bonding is being used more by high-end assemblers, especially in the heterogeneous realm.

The late ’90s saw a change in terminology. The term high density interconnect (HDI) technology entered the industry lexicon and PCB fabrication tools and techniques were drafted for the fabrication of advanced packages required to keep pace with the relentless advances in semiconductor integrated circuit technology as they sought to continue to deliver on Gordon Moore’s prophecy that transistor count on leading-edge semiconductor chips would double every 18–24 months.

The result was that feature sizes on the modules continued to shrink. Today, HDI packages commonly have line and space measurements of 50–75 microns (2–3 mils) and microvias have similar sizes. On the heels of HDI is ultra high-density interconnection (UHDI), where bleeding edge features are heading toward single digits. To participate in the manufacturing of these leading-edge interconnections, the facility must employ tools and technologies that just a couple of decades earlier were used to make semiconductor chips. These advances have put pressure on designers and developers to deal with the inevitable impact of greater density and higher speeds, the challenges associated with greater heat dissipation, and more critical signal integrity.

Today (and for the past decade), Asia has been manufacturing most of the bleeding-edge HDI and UHDI-enabled IC packaging substrates. However, there is a concerted effort in the U.S. to ensure that native capacity exists on native soil. The CHIPS Act provides funding for improvements in America, and there is expressed intent to build a facility for demonstrations and training to build up a workforce. The Department of Defense Executive Agent for Printed Circuit Board and Interconnect Technology has been championing this effort for several years.

With over 50 years in the electronics manufacturing industry, I find it fascinating how often technologies are recycled and given new names by those driving the next trend. What is next? Artificial Intelligence (AI) is upon us and its impact will be huge in terms of speed, bandwidth, and energy consumption. One thing appears certain: While we wait for the photonic synaptic transistor to be fully commercialized, we will continue to push electrons through copper for many years to come and can expect to be challenged by those charged with making the next generation of electronic devices. So, have fun.

Joe Fjelstad is founder and CEO of Verdant Electronics and an international authority and innovator in the field of electronic interconnection and packaging technologies with more than 185 patents issued or pending. To read past columns or contact Fjelstad, click here. Download your free copy of Fjelstad’s book Flexible Circuit Technology, 4th Edition, and watch his in-depth workshop series “Flexible Circuit Technology.”

This column originally appeared in the October 2024 issue of Design007 Magazine.