Siemens, Intel Foundry Advance Collaboration

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Siemens Digital Industries Software announced that its continued collaboration with Intel Foundry has resulted in multiple product certifications, updated foundry reference flows, and additional technology enablement leveraging the foundry’s leading-edge technologies for next-generation integrated circuits (IC) and advanced packaging. Siemens is a founding partner of the Intel Foundry Accelerator Chiplet Alliance – enabling a new and compelling  solution for 3D IC and chiplet offerings to a breadth of semiconductor market verticals.

Intel 18A Certification Achievements

Siemens’ industry-leading Calibre® nmPlatform tool is now certified for the latest Intel 18A production Process Design Kit (PDK). Intel 18A represents a significant technological leap forward, featuring innovative RibbonFET Gate-all-around transistors and the industry’s first PowerVia backside power delivery. This Calibre certification allows mutual customers to continue leveraging the Calibre® nmPlatform tool as their industry-standard sign-off solution with Intel Foundry's most advanced manufacturing process, accelerating time-to-market for next-generation chip designs.

Siemens and Intel Foundry have also successfully certified Siemens’ Solido™ SPICE and Analog FastSPICE (AFS) software tools for the latest Intel 18A production PDK. Both of these tools represent key elements of Siemens’ Solido™ Simulation Suite software, which is an advanced portfolio of AI-accelerated simulators for intelligent IC design and verification, providing leading-edge, feature-rich circuit verification for analog, mixed-signal, memory, library IP, 3D IC and System-on-a-chip (SoC) designs. The Intel 18A process node is also now enabled with Open Model Interface (OMI), the industry-standard platform for conducting IC aging modeling and reliability analyses, supported by Siemens’ Solido Simulation Suite.

Intel 18A Custom Reference Flow Enablement

Siemens’ Calibre® nmPlatform and its Analog FastSPICE (AFS) software, which is part of Siemens’ Solido™ Simulation Suite offerings, are also now enabled through the Intel Foundry Custom Reference Flow (CRF), a comprehensive custom design methodology package. Mutual customers can now access Siemens’ best-in-class simulation and sign-off flow for chiplets that extends to 3D IC designs.

Intel 18A-P and Intel 14A-E Enablement

In addition, the qualification of Siemens’ Calibre® nmPlatform and Solido™ Simulation Suite offerings for Intel 18A-P process node  is now underway. Customers can request the latest Intel 18A-P PDK for early design work and IP development. Moreover, both solutions are part of the Intel 14A-E process definition and Design Technology Co-Optimization (DTCO), with early runsets already available. Intel 14A-E is expected to deliver an even higher density and performance per watt compared to the Intel 18A process node.

"At Intel Foundry, we're building strategic alliances with industry leaders like Siemens to deliver best-in-class design solutions to our customers," said Suk Lee, VP & GM of Ecosystem Technology Office, Intel Foundry. "These powerful verification and design tools are rigorously tested to harness the full capabilities of our advanced process nodes. By integrating Siemens' expertise with our technology, we're not only streamlining design workflows but also creating pathways for our mutual customers to bring groundbreaking innovations to market faster and more efficiently."

Advanced Packaging Collaboration Milestones

Siemens today also announced the certification of a comprehensive reference workflow for Intel Foundry’s Embedded Multi-die Interconnect Bridge-T (EMIB-T) with Through Silicon Via technology. The workflow is driven by Siemens’ Innovator3D™ IC solution, which provides a consolidated cockpit for constructing a digital twin -- featuring a unified data model for design planning, prototyping and predictive analysis -- of the complete semiconductor package assembly. The workflow supports complete detailed implementations and thermal analysis of the die, EMIB-T and package substrate, signal and power integrity analysis, and finally, Package Assembly Design Kit (PADK) driven assembly verification. The Siemens technologies certified in this reference flow include Innovator3D™ IC, Calibre® nmDRC and nmLVS, Xpedition™ Package Designer, Calibre® 3DThermal, HyperLynx™ SI/PI, and Calibre® 3DStack. Customers can request the reference flow kit from Intel Foundry for early adoption and design exploration.

The collaboration has also established the availability of a prototype workflow for Embedded Multi-die Interconnect Bridge (EMIB) technology using Siemens’ Aprisa™ software. Siemens’ Aprisa Automatic Place and Route (APR) technology was used to implement the Power/Ground (PG) grid and bump routing of the Silicon EMIB die.

Finally, Siemens has joined Intel Foundry Accelerator Chiplet Alliance – the newest Accelerator Alliance program that aims to define and drive chiplet design infrastructure, interoperability, and security requirements essential to delivering today’s complex systems in the aerospace, defense, and commercial markets.

"As an industry leader in advanced packaging technologies, Siemens EDA is pleased to serve as an original member of the new Intel Foundry Accelerator Chiplet Alliance,” said Juan C. Rey, Senior Vice President and General Manager, Calibre product line, Siemens Digital Industries Software. “This alliance not only marks a significant milestone in our collaboration but also brings unparalleled value to our joint customers. Together, we are poised to accelerate development cycles and push the boundaries of semiconductor technology, creating groundbreaking solutions that meet the growing demands of the industry."