The Marketing Minute: Marketing Is a Team Sport
The Right Approach: Old Philosophies, New Tools
Trouble in Your Tank: HDI and UHDI—Building the Foundation of Advanced Packaging
The Global Electronics Association and Purdue University have signed a memorandum of understanding establishing a strategic partnership to advance innovation, workforce development and industry collaboration across the electronics ecosystem.
The partnership will connect Purdue’s research and technology-development capabilities with the Association’s expertise in standards, technical leadership, industry convening and global electronics manufacturing. The organizations will explore opportunities to collaborate in areas critical to the future of electronics, including advanced system integration and packaging, manufacturing challenges, long-term reliability, materials, supply-chain resilience, technology guidelines and workforce development.
An initial focus of the partnership is the Purdue University-led AI/HPC Hardware Packaging Consortium, operating under Purdue’s Atalla Institute for Advanced System Integration and Packaging (ASIP). The consortium brings together organizations across the semiconductor and electronics value chain to accelerate research and development in advanced packaging for artificial intelligence and high-performance computing hardware.
“Advanced packaging is central to the performance, power efficiency and reliability of next-generation electronic systems,” said Devan Iyer, Ph.D., chief strategist for advanced packaging solutions at the Global Electronics Association. “This strategic partnership with Purdue creates a valuable bridge between leading-edge research and the practical needs of the global electronics manufacturing ecosystem. We look forward to contributing our industry perspective and helping translate innovation into scalable, reliable solutions.”
As AI and high-performance computing increase demands on electronic systems, manufacturers and technology developers are confronting increasingly complex challenges in processor-memory architecture, power delivery, thermal management, co-packaged optics, chiplet integration, materials, metrology, manufacturing yield and reliability.
Through the partnership, the Association will help bring the voice and experience of the broader electronics manufacturing value chain into these discussions, from design and materials to components, fabrication, assembly, test and supply chain.
“AI and high-performance computing are raising the bar for every aspect of electronic system design and manufacturing,” said Matt Kelly, chief technology officer and vice president of technology solutions at the Global Electronics Association. “Working with Purdue and the ASIP Consortium gives us an opportunity to connect leading-edge research with the technical guidelines, standards and manufacturing practices needed to make advanced electronic packaging scalable, reliable and globally resilient.”
Purdue’s Atalla Institute for Advanced System Integration and Packaging brings together more than 35 faculty researchers working across advanced packaging challenges, including chip-package co-design, materials, metrology, modeling, reliability, system cooling and thermal management. Its research capabilities are supported by Purdue facilities and a broad network of industry and research partners.
The Association’s participation in the AI/HPC Hardware Packaging Consortium will help inform research priorities with real-world manufacturing needs and support the development of technology guidelines, standards and workforce capabilities for the next generation of electronics.
“This partnership will help connect Purdue’s research strengths with the experience, needs and perspective of the global electronics industry,” said Ganesh Subbarayan, Ph.D., director of ASIP and the James G. Dwyer professor of mechanical engineering at Purdue University. “By bringing together researchers, manufacturers and technology leaders, we can accelerate progress in advanced integration and packaging while preparing the workforce needed to support the future of microelectronics.”
The consortium kickoff meeting was held October 6, bringing together participants to establish shared priorities and advance collaboration across the advanced packaging ecosystem.
