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Karl's Tech Talk: Miniaturization and Reliability

Miniaturization of electronic devices has been a trend over decades and is continuing into the foreseeable future. How this trend affects the reliability of these devices is an important question. Some processes, when applied to ever-smaller dimensions, reach a point where they yield less reliable structures, and changes in materials and processing are necessary to maintain reliability. On the other hand, other novel technologies that enable smaller structures are inherently more reliable. The following technologies are examples of miniaturization-reliability relationships.

Wafer Bumping with Plated Copper Pillars

Wafer bumping, the formation of solderable, raised, conductive features that allow the connection of flip chips to a package, typically involves the use of solder, either applied by a stencil, or plated, or by the mechanical positioning of a preformed solder ball. Height and width of these bumps are about the same after reflow (i.e., the bumps become spherical after reflow). This means that minimum spacing requirements between solder bumps and the “stand-off height” are linked, and one cannot reduce one without reducing the other.

The use of plated copper pillars as bumps “decouples” the stand-off height from the minimum spacing between bumps because there is no reflow and the aspect ratio of the pillars remains as plated (Figures 1 and 2). The copper pillars are typically capped with a solderable surface such as plated tin. The higher stand-off height at smaller bump pitches can facilitate more reliable underfill coverage, and the better thermal (and electrical) conductivity of copper compared to solder may contribute to better thermal management; both factors contribute to interconnect reliability. However, the lower ductility of copper compared to solder is a potential detriment.

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Editor's Note: This article originally appeared in the August 2013 issue of The PCB Magazine.