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Knocking Down the Bone Pile: Tin Whisker Mitigation in Aerospace Applications, Part 3
IWLPC Program Finalized and Registration Now Open
August 13, 2015 | SMTAEstimated reading time: 1 minute
The SMTA and Chip Scale Review magazine are pleased to announce the presentation line-up for the 12th Annual International Wafer-Level Packaging Conference. The IWLPC will be held October 13-15, 2015 at the DoubleTree Airport Hotel in San Jose, California. Registration is now available online and Early Bird conference pricing is in effect until September 25, 2015, after which registration prices will go up $100.
The conference, held October 13 and 14, includes three tracks of technical paper presentations covering Wafer Level Packaging, 3-D (Stacked) Packaging, and MEMS Packaging. A strong lineup of plenary speakers and panelists from the world of 3D and MEMS was assembled to provide success stories and offer a glimpse of new and emerging technologies and applications.
Rama Alapati, Director of Package Architecture & Customer Technology (PACT) at GLOBALFOUNDRIES, is scheduled to give the keynote presentation the first day of the conference on “High Density Fan-Out: Evolution or Revolution.”
Sitaram Arkalgud, VP of 3D Technology at Invensas, will deliver the keynote on the second day, titled “2.5D/3D IC - Examining Low Cost Alternatives.”
The exhibition showcasing over 60 solutions providers covering everything from materials to equipment and market research to metrology will run concurrently with the conference on October 13 and 14. Though mostly sold out, a few booths still remain in the exhibition.
On Thursday, October 15, four application-oriented tutorials on Fan-Out Wafer Level Packaging, 3D ICs, Temporary Bonding of Electronics (Wafers, Displays, Devices), and Wafer Level Packaging for MEMS and Microsystems Technologies for Size and Cost Reductions will be instructed by experts in the field including Beth Keser, Ph.D., Qualcomm; John H. Lau, Ph.D., ASM Pacific Technology; Jared Pettit, Alex Brewer, Alman Law, and John Moore, DAETEC; and Leland "Chip" Spangler, Ph.D., Aspen Microsystems, LLC.
Visit http://www.iwlpc.com for more information.
Contact Jenny Ng at 952-920-7682 or jenny@smta.org with questions.
About SMTA
The SMTA membership is an international network of professionals who build skills, share practical experience and develop solutions in electronic assembly technologies, including microsystems, emerging technologies, and related business operations.
Chip Scale Review, now entering its 18th year, is the leading international magazine serving the semiconductor, IC and electronic device packaging market.
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