Disruptive Impact of Fan-out WLP Growth Coming for Electronics Industry
November 17, 2015 | TechSearchEstimated reading time: 1 minute
Fan-out wafer level packaging (FO-WLP) is a disruptive technology that will have a significant impact on the electronics industry in the coming years. WLP has seen strong growth, especially in the mobile devices, because it provides a low-profile package that meets the requirements of many smartphone makers. Billions of WLPs are shipped each year and FO-WLP adoption will drive the number even higher. In its new report, TechSearch International projects an 87% CAGR for FO-WLPs in unit volumes over the next 5 years.
As companies move to the next semiconductor technology node, smaller die are possible, allowing a greater number of die per wafer. At the same time the number of I/Os is increasing, and to route them a conventional WLP would require small diameter solder balls with fine pitch. Qualcomm has published information on the reliability challenges of going to ≤0.35mm pitch with a conventional fan-in WLP.
FO-WLP is an attractive solution that allows companies to continue taking advantage of the powerful economics of die shrink, while also meeting the small form factor, low-profile package requirements of mobile devices. FO-WLP is disruptive technology because there is no substrate and thin-film metallization is used for interconnect instead of bumps or wires. In the case of a face-up process, the die has a thick Cu post, but not a Cu pillar with a solder cap. The use of redistribution layers patterned with semiconductor technology makes it possible to achieve much finer feature sizes ≤5µm lines and spaces, than conventional organic substrate technologies.
With the use of FO-WLP for the logic bottom package in a package-on-package (PoP) configuration, the ultra thin target of <0.8mm PoP can be met. The only lower-profile PoP with memory and logic is a 3D IC memory and logic stack using through silicon vias (TSVs). Such an approach is costly, however and there are no thermal solutions for this stack in mobile applications.
Suggested Items
'Chill Out' with TopLine’s President Martin Hart to Discuss Cold Electronics at SPWG 2025
05/02/2025 | TopLineBraided Solder Columns can withstand the rigors of deep space cold and cryogenic environments, and represent a robust new solution to challenges facing next generation large packages in electronics assembly.
BEST Inc. Reports Record Demand for EZReball BGA Reballing Process
05/01/2025 | BEST Inc.BEST Inc., a leader in electronic component services, is pleased to announce they are experiencing record demand for their EZReball™ BGA reballing process which greatly simplifies the reballing of ball grid array (BGA) and chip scale package (CSP) devices.
Indium Wins EM Asia Innovation Award
05/01/2025 | Indium CorporationIndium Corporation, a leading materials provider for the electronics assembly market, recently earned an Electronics Manufacturing (EM) Asia Innovation Award for its new high-reliability Durafuse® HR alloy for solder paste at Productronica China in Shanghai.
Summit Interconnect Hollister Elevates PCB Prototyping with New TiTAN Direct Imaging System from Technica USA
05/01/2025 | Summit Interconnect, Inc.Summit Interconnect’s Hollister facility has recently enhanced its quick-turn PCB prototyping capabilities by installing the TiTAN PSR-H Direct Imaging (DI) system.
KOKI Expands U.S. Sales Coverage with Multiple New Representatives
04/29/2025 | KOKIKOKI, a global leader in advanced soldering materials and process optimization services, is pleased to announce the expansion of its U.S. sales network with the addition of three new manufacturers’ representative firms: Assembled Product Specialists, Diversitech Reps Inc., and Eagle Electronics.