-
- News
- Books
Featured Books
- pcb007 Magazine
Latest Issues
Current IssueInventing the Future with SEL
Two years after launching its state-of-the-art PCB facility, SEL shares lessons in vision, execution, and innovation, plus insights from industry icons and technology leaders shaping the future of PCB fabrication.
Sales: From Pitch to PO
From the first cold call to finally receiving that first purchase order, the July PCB007 Magazine breaks down some critical parts of the sales stack. To up your sales game, read on!
The Hole Truth: Via Integrity in an HDI World
From the drilled hole to registration across multiple sequential lamination cycles, to the quality of your copper plating, via reliability in an HDI world is becoming an ever-greater challenge. This month we look at “The Hole Truth,” from creating the “perfect” via to how you can assure via quality and reliability, the first time, every time.
- Articles
- Columns
- Links
- Media kit
||| MENU - pcb007 Magazine
Estimated reading time: 9 minutes

Contact Columnist Form
Design of Experiments
Figure 2: An example of factorial design of experiments (DOE) in printed circuit manufacturing to minimize innerlayer shifting during lamination.
The second experiment, in Figure 3, uses optimizing photoresist exposure, developing and etching to provide the highest production yield. The variable and levels were a full factorial design of three variables at three levels (center point):
1. Exposure energy in mjoules: 70, 50 & 30
2. Developer speed in inches per minute: 45, 40 & 35
3. Etcher speed in inches per minute: 45, 40 & 35.
The variables were chosen with the center point being the current production process: 50 mjoules, 40 in/min developer and 40 in/min etcher. The highest yield was 95% using slower developer speed, lower exposure intensity, and the slower etcher. Analysis shows that the developer speed has the greatest effect on yield and interacts with etcher speed.
Figure 3: An example of factorial design of experiments (DOE) in printed circuit manufacturing to optimize yield in exposure, developing and etch.
Page 3 of 5
More Columns from Happy’s Tech Talk
Happy’s Tech Talk #42: Applying Density Equations to UHDI DesignHappy’s Tech Talk #41: Sustainability and Circularity for Electronics Manufacturing
Happy’s Tech Talk #40: Factors in PTH Reliability—Hole Voids
Happy’s Tech Talk #39: PCBs Replace Motor Windings
Happy’s Tech Talk #38: Novel Metallization for UHDI
Happy’s Tech Talk #37: New Ultra HDI Materials
Happy’s Tech Talk #36: The LEGO Principle of Optical Assembly
Happy’s Tech Talk #35: Yields March to Design Rules