Documenting Your Flex Circuit DesignSeptember 16, 2020 | Tony Plemel, Flexible Circuit Technologies
Estimated reading time: 1 minute
As a flex circuit applications engineer, when I receive an RFQ, the first thing I do is look at the customer’s data and review their manufacturing notes. Quite often, I find notes that supersede IPC specifications in manufacturing documents, as customers often believe these added notes and associated specifications will make the circuit more robust. However, these non-standard IPC manufacturing specifications/notes can wreak havoc on the manufacturing process and can actually lead to a less robust circuit.
For example, a customer will sometimes specify additional copper plating, believing it will result in a more reliable circuit. In reality, that type of requirement can make the circuit less reliable, more difficult to manufacture, and more expensive. When manufacturing yields go down, the price goes up!
In taking a deeper dive into manufacturing notes and the potential issues that they can create, let’s use a three-layer multilayer flexible circuit as an example. The first note on a manufacturing print is usually “Manufacture to IPC6013, Class 2, Type 3.” This note should always be included; I cannot stress that enough!
Unfortunately, in the continued review of the documentation, I often find one or more additional conflicting notes further down in the manufacturing notes that overrule IPC6013 specifications.
One example would be “Minimum copper plating shall be 0.0015”.” This note supersedes the IPC-6013 specification in Table 1.
Table 1: IPC-6013 copper plating requirements.
PCB designers who are not well-versed in flex circuit manufacturing may not know that exceeding IPC-6013 of 984 µin (0.000984”) can cause the circuit to be less reliable and possibly cause problems later in the manufacturing process. Having a specified requirement this large (0.000516” thicker) will require the plating line at the factory to plate more than 0.0015” to ensure the minimum plating is 0.0015” thick.
To read this entire article, which appeared in the September 2020 issue of Design007 Magazine, click here.
There has always been pressure to reduce line and space as we have seen the bleeding edge technology go from 8 mils to 5 mils and then to 3 mils. The difference between “then” and “now” is that the prior advancements, for the most part, used the same processes, chemistry and equipment going from 8 mils to 3 mils. But going from 3 mil to sub 1 mil trace and space is a quantum leap in printed circuit board (PCB) technology that requires a whole new set of processes and materials.
In a previous column, the critical process of desmear and its necessity to ensure a clean copper surface connection was presented. Now, my discussion will focus on obtaining a void-free and tightly adherent copper plating deposit on these surfaces. After the desmear process, the task is to insure a continuous, conductive, and void-free deposit on the via walls and capture pad. Today, there are several processes that can be utilized to render vias conductive.
Panasonic’s Darren Hitchcock spoke with the I-Connect007 Editorial Team on the complexities of moving toward ultra HDI manufacturing. As we learn in this conversation, the number of shifting constraints relative to traditional PCB fabrication is quite large and can sometimes conflict with each other.
MKS’ Atotech, a leading surface finishing brand of MKS Instruments, will participate in the upcoming IPCA Expo at Bangalore International Exhibition Centre (BIEC) and showcase its latest PCB manufacturing solutions from September 13 – 15.
Flexible circuit applications can be as basic as furnishing electrical interconnect between two conventional circuit board assemblies, or to prove a platform for placing and interconnecting electronic components. During the planning and pre-design phase of the flexible circuit, there will be several material and process related questions that need to be addressed. Most flexible circuit fabricators welcome the opportunity to discuss their customers’ flexible circuit objectives prior to beginning the actual design process.