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A strong design constraint strategy carefully balances a wide range of electrical and manufacturing trade-offs. This month, we explore the key requirements, common challenges, and best practices behind building an effective constraint strategy.
All About That Route
Most designers favor manual routing, but today's interactive autorouters may be changing designers' minds by allowing users more direct control. In this issue, our expert contributors discuss a variety of manual and autorouting strategies.
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Why is it so difficult to create the ideal data package? Many of these simple errors can be alleviated by paying attention to detail—and knowing what issues to look out for. So, this month, our experts weigh in on the best practices for creating the ideal design data package for your design.
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Cadence Introduces EMX Designer
April 14, 2023 | Cadence Design Systems, Inc.Estimated reading time: 2 minutes

Cadence Design Systems, Inc. announced the new Cadence® EMX® Designer, a passive device synthesis and optimization technology that delivers, in split seconds, design rule check (DRC)-clean parametric cells (PCells) and accurate electromagnetic (EM) models of passive devices, such as inductors, transformers, T-coils and more. Seamlessly integrated with the Cadence Virtuoso® ADE Product Suite, the EMX Designer solution offers more than 10X faster synthesis times, with significant productivity gains versus other solutions.
The EMX Designer solution lets customers rapidly synthesize DRC-clean passive devices at a touch of a button, based on electrical and geometrical requirements. With unparalleled flexibility, EMX Designer PCells can easily be modified to meet the designers’ exact layout requirements, utilizing a long list of options from a user-friendly interface inside the Virtuoso platform. When used with the EMX 3D Planar Solver, the industry’s gold-standard electromagnetic modeling engine, the EMX Designer solution ensures the accuracy of generated models. The seamless integration with the Virtuoso platform offers users various options for plotting and appending results.
“pSemi evaluated the Cadence EMX Designer solution as we were interested in automating the passive device creation and optimization process for our proprietary PDKs,” said John Sung, Vice President of Engineering Infrastructure at pSemi. “EMX Designer fully met our requirements for PCell flexibility, speed and accuracy. It is seamlessly integrated into the Cadence design flow and will improve the productivity of our design teams.”
“The new EMX Designer solution adds key technology to our leading Custom IC design flow, delivering the most flexible passive-device PCells in record-breaking time while also enabling significant productivity gains,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “We are pleased to offer our customers an expanded, complete, highly differentiated and efficient IC design platform that addresses the early stages of the design all the way through to signoff and closure.”
“Using Cadence’s new EMX Designer solution, our team was able to improve productivity and reduce design cycle times,” said Peter Gammel, CEO, Ubilite. “We managed to synthesize passive devices with better performance, and at the same time, save 20% silicon area for the advanced process nodes we use with the new solution. EMX Designer offers us a versatile library of passive devices, delivering extremely accurate results across all process nodes at incredibly fast speeds.”
The EMX Designer solution seamlessly interfaces with Cadence EMX 3D Planar Solver and further supports the Cadence Intelligent System Design™ strategy, enabling system-on-chip (SoC) design excellence and system innovation.
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Siemens Transforms Customer Engagement for Electronic Component Manufacturers with PartQuest Design Enablement
08/06/2025 | SiemensSiemens Digital Industries Software today announced the launch of the PartQuest™ Design Enablement portfolio, a new, connected digital environment for electronic component manufacturers looking to scale smarter, more personalized and persistent engagement with their customers and prospects.
Review: PCEA Orange County Summer Meeting
08/06/2025 | Dan Feinberg, Technology Editor, I-Connect007The Printed Circuit Engineering Association (PCEA) represents a community of engineers, designers, and industry influencers dedicated to the advancement of PCB technology, design, and manufacturing, and the growth and knowledge of its membership. PCEA regularly hosts events to share the latest developments, best practices, and visions for the future of electronic design and manufacturing. The Orange County chapter seems to be one of the largest and most active ones and I was invited to attend the latest chapter event on July 24 in Costa Mesa, California.
Circuit Check Acquires Solution Sources Programming (SSP) to Become a Full-Service Test and Programming Provider with Expanded Presence in Silicon Valley
08/05/2025 | PR NewswireCircuit Check, a global leader in turnkey functional test systems across medical, automotive, industrial, military/aerospace, and emerging AI applications, today announced the acquisition of Solution Sources Programming (SSP), a trusted Silicon Valley provider of integrated test and programming solutions for over 35 years.
Advancing Electrolytic Copper Plating for AI-driven Package Substrates
08/05/2025 | Dirk Ruess and Mustafa Oezkoek, MKS’ AtotechThe rise of artificial intelligence (AI) applications has become a pivotal force driving growth in the server industry. Its challenging requirements for high-frequency and high-density computing are leading to an increasing demand for development of advanced manufacturing methods of package substrates with finer features, higher hole densities, and denser interconnects. These requirements are essential for modern multilayer board (MLB) designs, which play a critical role in AI hardware. However, these intricate designs introduce considerable manufacturing complexities.
Setting Design Constraints Effectively
07/31/2025 | Stephen V. Chavez, Siemens EDAPCB design requires controlling energy within the medium of a PCB. The manner in which we control the chaos of energy is by implementing and utilizing physical and electrical rules, known as constraints, along with a specific structure and material(s) that make up what is known as the foundation of the design. These rules govern everything within the PCB structure and generally fall into two camps: performance and manufacturability. Setting this foundation correctly is extremely important and the key to success.