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Current IssueShowing Some Constraint
A strong design constraint strategy carefully balances a wide range of electrical and manufacturing trade-offs. This month, we explore the key requirements, common challenges, and best practices behind building an effective constraint strategy.
All About That Route
Most designers favor manual routing, but today's interactive autorouters may be changing designers' minds by allowing users more direct control. In this issue, our expert contributors discuss a variety of manual and autorouting strategies.
Creating the Ideal Data Package
Why is it so difficult to create the ideal data package? Many of these simple errors can be alleviated by paying attention to detail—and knowing what issues to look out for. So, this month, our experts weigh in on the best practices for creating the ideal design data package for your design.
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Cadence Introduces EMX Designer
April 14, 2023 | Cadence Design Systems, Inc.Estimated reading time: 2 minutes

Cadence Design Systems, Inc. announced the new Cadence® EMX® Designer, a passive device synthesis and optimization technology that delivers, in split seconds, design rule check (DRC)-clean parametric cells (PCells) and accurate electromagnetic (EM) models of passive devices, such as inductors, transformers, T-coils and more. Seamlessly integrated with the Cadence Virtuoso® ADE Product Suite, the EMX Designer solution offers more than 10X faster synthesis times, with significant productivity gains versus other solutions.
The EMX Designer solution lets customers rapidly synthesize DRC-clean passive devices at a touch of a button, based on electrical and geometrical requirements. With unparalleled flexibility, EMX Designer PCells can easily be modified to meet the designers’ exact layout requirements, utilizing a long list of options from a user-friendly interface inside the Virtuoso platform. When used with the EMX 3D Planar Solver, the industry’s gold-standard electromagnetic modeling engine, the EMX Designer solution ensures the accuracy of generated models. The seamless integration with the Virtuoso platform offers users various options for plotting and appending results.
“pSemi evaluated the Cadence EMX Designer solution as we were interested in automating the passive device creation and optimization process for our proprietary PDKs,” said John Sung, Vice President of Engineering Infrastructure at pSemi. “EMX Designer fully met our requirements for PCell flexibility, speed and accuracy. It is seamlessly integrated into the Cadence design flow and will improve the productivity of our design teams.”
“The new EMX Designer solution adds key technology to our leading Custom IC design flow, delivering the most flexible passive-device PCells in record-breaking time while also enabling significant productivity gains,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “We are pleased to offer our customers an expanded, complete, highly differentiated and efficient IC design platform that addresses the early stages of the design all the way through to signoff and closure.”
“Using Cadence’s new EMX Designer solution, our team was able to improve productivity and reduce design cycle times,” said Peter Gammel, CEO, Ubilite. “We managed to synthesize passive devices with better performance, and at the same time, save 20% silicon area for the advanced process nodes we use with the new solution. EMX Designer offers us a versatile library of passive devices, delivering extremely accurate results across all process nodes at incredibly fast speeds.”
The EMX Designer solution seamlessly interfaces with Cadence EMX 3D Planar Solver and further supports the Cadence Intelligent System Design™ strategy, enabling system-on-chip (SoC) design excellence and system innovation.
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Showing Some Constraint: Design007 Magazine July 2025
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The Shaughnessy Report: Showing Some Constraint
07/14/2025 | Andy Shaughnessy -- Column: The Shaughnessy ReportWhen we first decided to cover strategies for setting PCB design constraints, one designer we spoke with said, “They’re not really constraints; they’re more like guardrails that prevent your design from going off a cliff.”