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This free seminar will discuss the new features included in Keysight’s EEsof EDA simulation tools and how the software helps engineers focused on high-speed digital electronics solve their toughest design challenges. The seminar will look at all stages of the pre-layout, post-layout and measurement design flow.
Tools featured in the seminar include: ADS, ADS Controlled Impedance Line Designer (CILD), SI S-parameter analysis tools, and the ADS PCIe and USB test benches used with Keysight real-time oscilloscope certified test compliance software.
Attendees also will see a preview of the new power integrity PI Pro simulator with IR drop and decoupling capacitor optimization, available in upcoming release of ADS 2015.09. Registration is required to attend.
July 14 and July 16
Agilent Technologies, 5301 Stevens Creek Boulevard, Santa Clara, CA, the Aristotle Room.
To register, click here. For additional information, visit www.keysight.com/find/eesof.
Dana Korf, Korf Consultancy
The original Star Trek series came into my life in 1966 as I was entering sixth grade. I was fascinated by the technology being used, such as communicators and phasers, and the crazy assortment of humans and aliens in each episode. My favorite episode is “The Trouble with Tribbles,” an episode combining cute Tribbles, science, and good/bad guys—sprinkled with sarcastic humor.
Ed Acheson, Cadence Design Systems
With the current design transfer formats, rigid-flex designers face a hand-off conundrum. You know the situation: My rigid-flex design is done so now it is time to get this built and into the product. Reviewing the documentation reveals that there are tables to define the different stackup definitions used in the design. The cross-references for the different zones to areas of the design are all there, I think. The last time a zone definition was missed, we caused a costly mistake.
Bill Hargin, Z-zero
When Bill Hargin was cutting his teeth in high-speed PCB design some 25 years ago, speeds were slow, layer counts were low, dielectric constants and loss tangents were high, design margins were wide, copper roughness didn’t matter, and glass-weave styles didn’t matter. Dielectrics were called “FR-4” and their properties didn’t matter much. A fast PCI bus operated at just 66 MHz. Times have certainly changed.