Share on:

Share on LinkedIn Share on X Share on Facebook Share with email

Testimonial

"Your magazines are a great platform for people to exchange knowledge. Thank you for the work that you do."

Simon Khesin - Schmoll Maschinen

Suggested Items

BOOK EXCERPT: The Printed Circuit Assembler’s Guide to...Design for Test, A Practical Guide to Test and Inspection, Chapter 1

06/04/2026 | I-Connect007
Over the last two to three decades, the electronics industry has experienced a significant transformation. Circuit card assembly (CCA) and printed circuit board (PCB) design have become highly automated and digitized, allowing for faster development and increased design reuse. Engineers can now easily build on existing, proven architectures. Despite these advancements, one key area often falls behind: test and inspection.

Siemens, Partners Launch Reference Architecture for NVIDIA AI Data Centers

06/03/2026 | Siemens
Siemens – together with NVIDIA and Fluence, and incorporating nVent-aligned design considerations – has developed an NVIDIA DSX Vera Rubin-aligned reference design that translates NVIDIA’s AI factory vision into a deployable, industrialized electrical, power and controls architecture for hyperscalers, colocation providers, and specialized cloud infrastructure providers.

GlobalFoundries Completes Acquisition of Synopsys’ Processo

06/03/2026 | GlobalFoundries
GlobalFoundries announced the completion of its previously announced acquisition of Synopsys’ ARC Processor IP Solutions business.

Happy’s Tech Talk #48: Digital Twins—Integrating Design and Manufacturing

06/02/2026 | Happy Holden -- Column: Happy’s Tech Talk
New product realization and design for manufacturing and assembly (DFM/A) are becoming increasingly visible as programs that can improve time-to-market and reduce product costs. These simulations of real-time manufacturing are now referred to as digital twins. While many companies are developing such programs, a unifying framework is needed to coordinate their application.

Cadence Unveils Industry’s First Fully Autonomous Virtual Engineer for Chip Design, powered by NVIDIA

06/01/2026 | Cadence Design Systems
At Computex 2026, Cadence announced the industry’s first fully autonomous virtual agentic AI design engineer, extending the ChipStack™ AI Super Agent to Level-5 autonomy.
Copyright © I-Connect007 | IPC Publishing Group Inc. All rights reserved. Log in