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Does Copper Pour on a Signal Layer Decrease Signal-To-Signal Isolation?
April 7, 2022 | Steve Hageman, Analog HomeEstimated reading time: 1 minute

Does putting a ground pour on PCB signal layers make the isolation better or worse? It can go either way, but with the proper knowledge and application, this technique will improve your designs.
In this article, I’ll discuss how to simulate trace-to-trace isolation with true electromagnetic simulation software. We’ll also cover a variety of rules of thumb that can help you stay away from trouble.
Fact or Fiction?
Recently an acquaintance told me, “I have heard that putting a copper pour on a signal layer between traces actually makes the isolation between the traces worse.” I grabbed one of my RF boards and said, “If that is so, then how do all these RF boards that I have done with co-planar waveguide over ground manage to function? They all have copper pours on the signal layer, and they work to very high frequencies.”
Since co-planar waveguide over ground (CPWG), which is essentially “pouring copper on a signal layer,” is used for a lot of RF work, and is proven to work for very high-performance RF circuits, how did this contradictory opinion catch on in the industry?
To investigate this, I used a one-inch section of 50-ohm microstrip consisting of an aggressor trace from ports 1 to 2 and a victim trace running in parallel from ports 3 to 4. I used typical values for the dimensions as might be on a real PCB. The trace width is 20 mils, with a spacing of 60 mils from center to center, over an FR-4 substrate, 9.5 mils thick, with a modeled Er of 4.4.
To read this entire article, which appeared in the March 2022 issue of Design007 Magazine, click here.
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Global PCB Connections: Understanding the General Fabrication Process—A Designer’s Hidden Advantage
08/14/2025 | Markus Voeltz -- Column: Global PCB ConnectionsDesigners don’t need to become fabricators, but understanding the basics of PCB fabrication can save you time, money, and frustration. The more you understand what’s happening on the shop floor, the better you’ll be able to prevent downstream issues. As you move into more advanced designs like HDI, flex circuits, stacked vias, and embedded components, this foundational knowledge becomes even more critical. Remember: the fabricator is your partner.
MKS’ Atotech to Participate in IPCA Electronics Expo 2025
08/11/2025 | AtotechMKS Inc., a global provider of enabling technologies that transform our world, announced that its strategic brands ESI® (laser systems) and Atotech® (process chemicals, equipment, software, and services) will showcase their latest range of leading manufacturing solutions for printed circuit board (PCB) and package substrate manufacturing at the upcoming 17th IPCA Show to be held at Pragati Maidan, New Delhi from August 21-23, 2025.
MKS Showcases Next-generation PCB Manufacturing Solutions at the Thailand Electronics Circuit Asia 2025
08/06/2025 | MKS Instruments, Inc.MKS Inc, a global provider of enabling technologies that transform our world, today announced its participation in Thailand Electronics Circuit Asia 2025 (THECA 2025), taking place August 20–22 at BITEC in Bangkok.
Point2 Technology, Foxconn Interconnect Technology Partner to Revolutionize AI Cluster Scalability with Terabit-Speed Interconnect
08/06/2025 | BUSINESS WIREPoint2 Technology, a leading provider of ultra-low-power, low-latency mixed-signal SoC solutions for multi-terabit interconnect, and Foxconn Interconnect Technology (FIT), a global leader in precision interconnect solutions, have signed a Memorandum of Understanding (MOU) to accelerate the commercialization of next-generation Active RF Cable (ARC) and Near Pluggable e-Tube (NPE) solutions.
Advancing Electrolytic Copper Plating for AI-driven Package Substrates
08/05/2025 | Dirk Ruess and Mustafa Oezkoek, MKS’ AtotechThe rise of artificial intelligence (AI) applications has become a pivotal force driving growth in the server industry. Its challenging requirements for high-frequency and high-density computing are leading to an increasing demand for development of advanced manufacturing methods of package substrates with finer features, higher hole densities, and denser interconnects. These requirements are essential for modern multilayer board (MLB) designs, which play a critical role in AI hardware. However, these intricate designs introduce considerable manufacturing complexities.