Part 1: PCB Designer's Notebook:
Fine-pitch and Die-size Array Packages Design and Assembly

Estimated reading time: 4 minutes

By Vern Solberg

Chipscale packaging (CSP) is by now generic terminology used to reference an array packaged IC that is the same size or nearly the same size as the die element. The industry has divided CSP into two distinct variations. The fine-pitch array package (FBGA) described in JEDEC JEP95 Section 4.5 is a package outline with specifically defined dimensions, while the dimensions of the die-size array package (DSBGA) body detailed in JEP95 Section 4.7 conforms to the actual outline of the die element. The purpose of the design guideline standards are to establish a protocol for developing mechanical outlines and conformance, and to assist in establishing land pattern requirements for their attachment.

The controlling factor for the JEDEC standardization of array packages is the overall size (outline) and aspect ratio of the contact array. The JEP95 design guideline documents define the physical features of the finished device and include variations for both contact size and pitch. The documents also furnish the controlling tolerances for contact position, size, and maximum contact capability based on package outline. The actual contact diameter furnished on the package will be influenced by the contact pitch selected for a specific application. Allowable pitch variations for the FBGA package family are 0.80, 0.65, and 0.50 mm. The contact pitch variations for the DSBGA family allow the addition of 0.75-mm contact pitch to the set.

The advantage of selecting the FBGA package is that it will not be subject to physical change even though the die element will likely differ from one manufacturer to another. The outline of the DSBGA package, on the other hand, may be furnished as square or rectangular and likely will differ in outline dimensions from one suppler to another. A moderate die design modification likely will occur during the product's life cycle, reducing the die outline. This commonly is referred to as die shrink. If the DSBGA land pattern was developed to anticipate die shrink, the modified package outline will not impact the contact array. If the die shrink is more dramatic, the land pattern pitch for the contact array likely will be affected, forcing a redesign of the circuit structure to accommodate the new land pattern and interface.

All active device package outlines are developed using hard metric dimensioning for all primary features. That is, the metric dimension will have two positions following the decimal point. To comply with the hard metric rule, the second position following the decimal point must be a zero or a five, e.g. XX.40 mm or XX.45 mm). There is wide latitude allowed for contact diameters. As the contact pitch shrinks, the variation of contact size becomes more limited. The 0.80-mm-pitch array package allows five distinct contact diameters ranging between 0.50 and 0.30 mm, while the 0.50-mm-pitch array package contact diameter will be either 0.30 or 0.25 mm. Standardization of FBGA and DSBGA packaging has considered a number of physical variables, including diameter of the individual ball and positional accuracy of the ball in relation to a true position within the component outline. Accurate position and dimensional control of the land pattern array on the host circuit structure is a vital factor in the successful implementation of fine-pitch configurations. Even small dimensional differences can translate into the difference between success and failure of the assembly process.

The JEDEC Design Guide states that the solderable surface (land pattern) may be defined by an opening in the solder resist layer (Type 1) or by the size of the metalized pad (Type 2). The ball contact may be elliptical provided the ratio of major or minor axis is no greater than 2/1 and the surface area is no less than the minimum for a circular pad. For Type 2 designs, exposed metal conductor traces are permitted outside the land area. Many component manufacturers use soldermask-defined Type 1 lands. When this technique is used, the nominal land diameter should be increased by the amount of soldermask encroachment onto the land (usually about 0.1 mm). The opening in the soldermask then represents the actual diameter to which the ball will become attached, while the overall land diameter is slightly larger to accommodate the soldermask-defined land. It should be noted that routing density is decreased, since the land is larger.

Most users prefer Type 2 lands because these furnish a more robust solder interface between contact and land as well as maximizing clearance between lands for surface routing of conductor circuits. Dimensional control and consistency in the land patterns geometry will allow the assembly specialist to fine tune the soldering process to achieve the most robust and reliable interface between package and board. In regard to establishing the actual land pattern surface diameter, the IPC-7095 recommends a land pattern diameter for the fine-pitch BGA that is approximately 20% smaller than the nominal ball contact diameter. The slightly smaller land forces the contact profile to maximize standoff clearance for cleaning efficiency and, following reflow soldering, the contacts will retain a more spherical shape.

Part II on this topic will provide information and recommendation for solder paste stencil design and solder printing criteria.

Vern Solberg, an SMT Editorial Advisory Board Member, is a technical consultant specializing in surface mount and microelectronic design and development. Additionally, Vern holds several patents for IC packaging innovations and is a member of many industry organizations, including IPC, IMAPS, SMTA, and the JISSO International Council. He may be contacted at (408) 568-3734; vsolberg123@aol.com.